Oversampled image sensor with conditional pixel readout

Patent metadata

Field	Value
Publication number	US-10277843-B2
Application number	US-201715589149-A
Country	US
Kind code	B2
Filing date	May 8, 2017
Priority date	Sep 10, 2013
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

First claim

What is claimed is:

1. An integrated-circuit image sensor comprising:
a pixel array having a plurality of pixels disposed in rows and columns;
a plurality of pixel read-out lines coupled to respective columns of the pixels;
a plurality of comparator circuits each coupled to a respective one of the pixel read-out lines;
an analog-to-digital converter (ADC) circuit; and
a first multiplexing circuit having inputs coupled respectively to the pixel read-out lines and an output coupled to an input of the ADC circuit.

2. The integrated-circuit image sensor of claim 1 wherein each of the plurality of comparator circuits comprises (i) a first input to receive a respective pixel read-out signal from a selected pixel within the column of pixels to which the respective pixel read-out line is coupled and (ii) a second input, and wherein the integrated-circuit image sensor further comprises a second multiplexing circuit having inputs coupled to respective reference voltage lines and an output coupled to the second input of at least one of the comparator circuits.

3. The integrated-circuit image sensor of claim 2 wherein the reference voltage lines comprise a first reference voltage line to convey a saturation threshold voltage and a second reference voltage line to convey an eclipse threshold voltage, the saturation threshold voltage corresponding to a pixel read-out signal level indicative of photo-well saturation within the selected pixel and the eclipse threshold voltage corresponding to a pixel read-out signal level indicative of an eclipse event within the selected pixel.

4. The integrated-circuit image sensor of claim 1 wherein each one of the plurality of comparator circuits comprises (i) a first input to receive a respective pixel read-out signal from a selected pixel within the column of pixels to which the respective pixel read-out line is coupled, (ii) a second input to receive a selected threshold level, and (iii) circuitry to generate a comparator-result signal that indicates whether the pixel read-out signal from the selected pixel exceeds the selected threshold level, and wherein the integrated-circuit image sensor further comprises circuitry to selectively disable operation of the ADC circuit with respect to the pixel read-out signal based at least in part on the comparator-result signal.

5. The integrated-circuit image sensor of claim 4 wherein the circuitry to generate the comparator-result signal that indicates whether the pixel read-out signal exceeds the selected threshold level comprises circuitry to indicate that the pixel read-out signal exceeds the selected threshold level in response to detecting a pixel read-out signal voltage lower than a voltage indicated by the selected threshold level.

6. The integrated-circuit image sensor of claim 1 wherein the first multiplexing circuit comprises (i) circuitry to switchably couple a selected one of the pixel read-out lines to the ADC circuit and (ii) a control input to receive a control signal that specifies the selected one of the pixel read-out lines.

7. The integrated-circuit image sensor of claim 6 further comprising control circuitry that sequences the control signal to select each of the pixel read-out lines to be the selected one of the pixel read-out lines during a respective time interval.

8. The integrated-circuit image sensor of claim 7 where in the control circuitry repeatedly steps the control signal through a pattern of values to iteratively select each of the pixel read-out lines.

9. The integrated-circuit image sensor of claim 1 further comprising a buffer memory and a second multiplexing circuit coupled between the buffer memory and an output of the ADC circuit, the second multiplexing circuit comprising circuitry to switchably route a sequence of digital pixel values generated by the ADC circuit to respective storage locations within the buffer memory, each of the digital pixel values constituting a digital representation of a pixel read-out signal conveyed on a respective one of the pixel read-out lines.

10. The integrated-circuit image sensor of claim 1 wherein the ADC circuit comprises a successive approximation register ADC circuit.

11. The integrated-circuit image sensor of claim 10 further comprising a second multiplexing circuit to supply a sequence of reference voltages to the successive approximation register ADC circuit to be applied therein in performance of a successive-approximation analog-to-digital conversion operation.

12. A method of operation within an integrated-circuit image sensor having a pixel array, the method comprising:
generating respective read-out signals on a plurality of column read-out lines coupled to respective columns of pixels within the pixel array;
comparing the read-out signals with at least one reference threshold within respective comparator circuits coupled respectively to the column read-out lines; and
switchably coupling each of the column read-out lines to an analog-to-digital converter (ADC) circuit to route, at respective times, each of the read-out signals to the ADC circuit.

13. The method of claim 12 further comprising switchably coupling a sequence of reference thresholds to the comparator circuits to be compared with the read-out signals, the sequence of reference thresholds including the at least one reference threshold and at least one other reference threshold.

14. The method of claim 13 wherein the at least one reference threshold comprises a saturation threshold voltage corresponding to a pixel read-out signal level indicative of photo-well saturation within a selected pixel, and wherein the at least one other reference threshold comprises an eclipse threshold voltage corresponding to a pixel read-out signal level indicative of an eclipse event within the selected pixel.

15. The method of claim 12 further comprising selectively enabling the ADC circuit to generate a digital representation of each one of the read-out signals based at least in part on a comparison-result signal generated by a respective one of the comparator circuits, the comparison-result signal indicating whether the one of the read-out signals exceeds the at least one reference threshold.

16. The method of claim 15 wherein the comparison-result signal indicates that the one of the read-out signals exceeds the at least one reference threshold if the one of the read-out signals has a voltage level lower than a voltage level of the at least one reference threshold.

17. The method of claim 12 further comprising switchably routing a sequence of digital pixel values generated by the ADC circuit to respective storage locations within a buffer memory, the digital pixel values constituting respective digital representations of the read-out signals.

18. The method of claim 12 further comprising performing a sequence of analog-to-digital conversions within the ADC circuit to generate digital representations of the read-out signals.

19. The method of claim 18 wherein performing the sequence of analog-to-digital conversions comprises performing a successive-approximation analog-to-digital conversion of each of the read-out signals during a respective time interval.

20. An integrated-circuit image sensor comprising:
a pixel array;
a plurality of comparator circuits;
an analog-to-digital converter (ADC) circuit;
means for generating respective read-out signals on a plurality of column read-out lines coupled to respective columns of pixels within the pixel array;
means for comparing each of the read-out signals with at leas

Assignees

• Rambus Inc

Inventors

• Smith Craig M
• Guidash Michael
• Endsley Jay
• Vogelsang Thomas
• Harris James E

Classifications

• H04N25/46

  by combining or binning pixels · CPC title

• H04N25/583

  with different integration times · CPC title

• H04N25/57

  Control of the dynamic range · CPC title

• H04N25/766

  comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

• H04N25/59 Primary

  by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title