Display apparatus and electronic apparatus

US10276814B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10276814-B2
Application numberUS-201816046219-A
CountryUS
Kind codeB2
Filing dateJul 26, 2018
Priority dateDec 13, 2010
Publication dateApr 30, 2019
Grant dateApr 30, 2019

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed herein is a display apparatus, including: a foldable substrate; a pixel array section including a plurality of pixels disposed on the substrate and each including an electro-optical device; the foldable substrate being folded at a substrate end portion at least on one side thereof around the pixel array section; a peripheral circuit section disposed on the substrate end portion and adapted to drive the pixels of the pixel array section; and a pad section provided on the substrate end portion on which the peripheral circuit section is provided and adapted to electrically connect the peripheral circuit section to the outside of the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus, comprising: a foldable first substrate; a pixel array including a plurality of pixels on a central portion of the first substrate, respective ones of the plurality of pixels comprising an electro-optical device; a resin film on the pixel array; a peripheral circuit formed outside of the pixel array and configured to drive the pixel array; pads on a peripheral portion of the first substrate and connected to the peripheral circuit; a circuit section configured to drive the electro-optical device and including a circuit element formed on the first substrate; a flattening film and a window insulation film laminated on the circuit element; and a second substrate disposed above the flattening film and the window insulation film in a region of the central portion of the first substrate, wherein the first substrate is folded such that the peripheral circuit partially overlaps the central portion of the first substrate and the peripheral circuit is disposed under the pixel array. 2. The display apparatus according to claim 1 , wherein the first substrate is folded such that the pads are disposed under the pixel array. 3. The display apparatus according to claim 1 , wherein the pads are provided at a location on the peripheral portion of the first substrate, on which the peripheral circuit is provided, farther than a folding portion. 4. The display apparatus according to claim 3 , wherein a groove configured to prevent water invasion is formed on a side of the pixel array with respect to the folding portion on the first substrate in such a manner as to surround the pixel array. 5. The display apparatus according to claim 4 , wherein the groove is formed along a side of the peripheral circuit with respect to the folding portion in such a manner as to surround the peripheral circuit.

Assignees

Inventors

Classifications

  • Details of drivers for scan electrodes · CPC title

  • Organic PV cells · CPC title

  • Flexible substrates, e.g. plastics, organic film · CPC title

  • Flexible displays · CPC title

  • Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

Patent family

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Frequently asked questions

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What does patent US10276814B2 cover?
Disclosed herein is a display apparatus, including: a foldable substrate; a pixel array section including a plurality of pixels disposed on the substrate and each including an electro-optical device; the foldable substrate being folded at a substrate end portion at least on one side thereof around the pixel array section; a peripheral circuit section disposed on the substrate end portion and ad…
Who is the assignee on this patent?
Joled Inc
What technology area does this patent fall under?
Primary CPC classification G09G3/325. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).