Compound semiconductor device

Patent metadata

Field	Value
Publication number	US-10276701-B2
Application number	US-201715709017-A
Country	US
Kind code	B2
Filing date	Sep 19, 2017
Priority date	Nov 27, 2014
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

A compound semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor includes a plurality of unit transistors. The bump is electrically connected to emitters of the plurality of unit transistors. The plurality of unit transistors are arranged in a first direction. The bump is disposed above the emitters of the plurality of unit transistors while extending in the first direction. The emitter of at least one of the plurality of unit transistors is displaced from a center line of the bump in the first direction toward a first side of a second direction which is perpendicular to the first direction. The emitter of at least another one of the plurality of unit transistors is displaced from the center line of the bump in the first direction toward a second side of the second direction.

First claim

What is claimed is:

1. A compound semiconductor device comprising:
a heterojunction bipolar transistor including a plurality of unit transistors;
a metal-insulator-metal capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the plurality of unit transistors; and
a bump electrically connected to emitters of the plurality of unit transistors, wherein
the plurality of unit transistors are arranged in a first direction,
the bump is disposed above the emitters of the plurality of unit transistors while extending in the first direction,
the emitter of at least one of the plurality of unit transistors is displaced from a center line of the bump in the first direction toward a first side of a second direction which is perpendicular to the first direction,
the emitter of at least another one of the plurality of unit transistors is displaced from the center line of the bump in the first direction toward a second side of the second direction,
part of each of the emitters displaced from the center line of the bump is not covered by the bump, and
each of the metal-insulator-metal capacitors is not covered by the bump.

2. A compound semiconductor device according to claim 1 , wherein each unit transistor has a resistor connected at one end to a bias control wire and at the other end to the base wire.

3. A compound semiconductor device according to claim 2 , wherein each of the resistor is not covered by the bump.

4. A compound semiconductor device according to claim 3 , wherein the emitters of the plurality of unit transistors are displaced from the center line of the bump toward the first side and second side alternately by one by one.

5. A compound semiconductor device according to claim 3 , wherein the emitters of the plurality of unit transistors are displaced from the center line of the bump toward the first side and second side alternately by a group of a plurality of unit transistors.

6. A power amplifier module comprising:
the compound semiconductor device according to claim 1 , wherein, the bumps are connected to a ground surface of module substrates.

7. A power amplifier module comprising:
the compound semiconductor device according to claim 2 , wherein, the bumps are connected to a ground surface of module substrates.

8. A power amplifier module comprising:
the compound semiconductor device according to claim 3 , wherein, the bumps are connected to a ground surface of module substrates.

9. A power amplifier module comprising:
the compound semiconductor device according to claim 4 , wherein, the bumps are connected to a ground surface of module substrates.

10. A power amplifier module comprising:
the compound semiconductor device according to claim 5 , wherein, the bumps are connected to a ground surface of module substrates.

11. A compound semiconductor device having sub-groups and each sub-group comprising:
a heterojunction bipolar transistor including a plurality of unit transistors;
a metal-insulator-metal capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the plurality of unit transistors; and
a bump electrically connected to emitters of the plurality of unit transistors, wherein
the plurality of unit transistors are arranged in a first direction,
the bump is disposed above the emitters of the plurality of unit transistors while extending in the first direction,
the emitter of at least one of the plurality of unit transistors is displaced from a center line of the bump in the first direction toward a first side of a second direction which is perpendicular to the first direction,
the emitter of at least another one of the plurality of unit transistors is displaced from the center line of the bump in the first direction toward a second side of the second direction,
part of each of the emitters displaced from the center line of the bump is not covered by the bump, and
each of the metal-insulator-metal capacitors is not covered by the bump.

12. A compound semiconductor device according to claim 11 , wherein each unit transistor has a resistor connected at one end to a bias control wire and at the other end to the base wire.

13. A compound semiconductor device according to claim 12 , wherein each of the resistor is not covered by the bump.

14. A compound semiconductor device according to claim 13 , wherein the emitters of the plurality of unit transistors are displaced from the center line of the bump toward the first side and second side alternately by one by one.

15. A compound semiconductor device according to claim 13 , wherein the emitters of the plurality of unit transistors are displaced from the center line of the bump toward the first side and second side alternately by a group of a plurality of unit transistors.

16. A power amplifier module comprising:
the compound semiconductor device according to claim 11 , wherein, the bumps are connected to a ground surface of module substrates.

17. A power amplifier module comprising:
the compound semiconductor device according to claim 12 , wherein, the bumps are connected to a ground surface of module substrates.

18. A power amplifier module comprising:
the compound semiconductor device according to claim 13 , wherein, the bumps are connected to a ground surface of module substrates.

19. A power amplifier module comprising:
the compound semiconductor device according to claim 14 , wherein, the bumps are connected to a ground surface of module substrates.

20. A power amplifier module comprising:
the compound semiconductor device according to claim 15 , wherein, the bumps are connected to a ground surface of module substrates.

Assignees

• Murata Manufacturing Co

Inventors

• Sasaki Kenji
• Kurotani Kingo
• Kitahara Takashi

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/241

  Dispositions, e.g. layouts · CPC title

• H10W72/232

  Plan-view shape, i.e. in top view · CPC title

• H10W72/90

  Bond pads, in general · CPC title

• H10W72/29

  Bond pads specially adapted therefor · CPC title