Sample-and-hold circuit for an electrical signal

US10276255B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10276255-B2
Application numberUS-201815866474-A
CountryUS
Kind codeB2
Filing dateJan 10, 2018
Priority dateJan 10, 2017
Publication dateApr 30, 2019
Grant dateApr 30, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Sample-and-hold device for an electrical signal including an input module having two inputs, including a first switching block including two input switches, each input of the input module being connected at the input of one of the input switches, the input module being connected at the input of a first track-and-hold module with two inputs and two outputs, so as to alternately convey the signal from one of the two inputs to one of the two inputs of the first track-and-hold module; the device including a second track-and-hold module connected in parallel with the first track-and-hold module, these track-and-hold modules connected at the output of the first switching block, and an output module including a second switching block including two output switches, the outputs of the first and second track-and-hold modules being connected to the inputs of the output switches, to time interleave the output signals of the track-and-hold modules.

First claim

Opening claim text (preview).

The invention claimed is: 1. A sample-and-hold device for an electrical signal comprising: an input module having two inputs, comprising a first switching block comprising two input switches, each input of the input module being connected at the input of one of said input switches, the input module being connected at the input of a first track-and-hold module with two inputs and two outputs, so as to alternately convey the signal from one of the two inputs of the input module to one of the two inputs of the first track-and-hold module; a second track-and-hold module connected in parallel with the first track-and-hold module, said first track-and-hold module and second track-and-hold module being connected at the output of the first switching block; an output module comprising a second switching block comprising two output switches, the outputs of said first track-and-hold module and second track-and-hold module being connected to the inputs of the output switches so as to perform time interleaving of the output signals of the first track-and-hold module and the second track-and-hold module; a first feedback loop connected between the outputs and the inputs of the first track-and-hold module; and a second feedback loop connected between the outputs and the inputs of the second track-and-hold module. 2. The sample-and-hold device according to claim 1 , wherein the first switching block comprises a first input switch and a second input switch, a first output of the first input switch being connected to a first input of the first track-and-hold module, and a second output of the first input switch being connected to a first input of the second track-and-hold module, a first output of the second input switch being connected to a second input of the first track-and-hold module, and a second output of the second input switch being connected to a second input of the second track-and-hold module. 3. The sample-and-hold device according to claim 2 , wherein in a first operating position, the first input switch connects the first input to the first input of the first track-and-hold module, and the second input switch connects the second input to the second input of the first track-and-hold module. 4. The sample-and-hold device according to claim 2 , wherein in a second operating position, the first input switch connects the first input to the first input of the second track-and-hold module, and the second input switch connects the second input to the second input of the second track-and-hold module. 5. The sample-and-hold device according to claim 1 , further comprising a clock generator, able to generate a first clock signal with a predetermined frequency, and a second clock signal, with a same predetermined frequency, reversed relative to the first clock signal. 6. The sample-and-hold device according to claim 5 , wherein the first track-and-hold module is commanded by the first clock signal, and the second track-and-hold module is commanded by the second clock signal. 7. The sample-and-hold device according to claim 5 , wherein the first switching block is commanded by said first clock signal able to command the switching of the two input switches of the first switching block between a first operating position and a second operating position. 8. The sample-and-hold device according claim 5 , wherein the second switching block is commanded by said second clock signal able to command the switching of the two output switches between a first operating position and a second operating position. 9. The sample-and-hold device according to claim 5 , wherein said first clock signal and second clock signal have a duty cycle ratio differing by 50%, and in which an offset current is applied to the clock generator, so as to correct the duty cycle ratio.

Assignees

Inventors

Classifications

  • Sampling or signal conditioning arrangements specially adapted for A/D converters · CPC title

  • G11C27/02Primary

    Sample-and-hold arrangements (G11C27/04 takes precedence) · CPC title

  • Parallel/series conversion or vice versa (digital stores in which the information is moved stepwise per se G11C19/00) · CPC title

  • Details of sampling arrangements or methods · CPC title

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What does patent US10276255B2 cover?
Sample-and-hold device for an electrical signal including an input module having two inputs, including a first switching block including two input switches, each input of the input module being connected at the input of one of the input switches, the input module being connected at the input of a first track-and-hold module with two inputs and two outputs, so as to alternately convey the signal…
Who is the assignee on this patent?
Thales Sa
What technology area does this patent fall under?
Primary CPC classification G11C27/02. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).