Pixel array structure

US10276088B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10276088-B2
Application numberUS-201715858111-A
CountryUS
Kind codeB2
Filing dateDec 29, 2017
Priority dateJan 4, 2017
Publication dateApr 30, 2019
Grant dateApr 30, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel array structure includes a plurality of scanning lines and a plurality of pixel blocks. Each pixel block includes a plurality of data lines, a plurality of pixel units, a wireless receiving unit, and a position selection unit. The plurality of pixel units is arranged in an array form, and each pixel unit is coupled to one of the plurality of scanning lines and one of the plurality of data lines. The wireless receiving unit receives a data signal in a wireless manner. The position selection unit transmits the data signal to one of the plurality of data lines according to a position selection signal.

First claim

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What is claimed is: 1. A pixel array structure, comprising: a plurality of scanning lines; a plurality of pixel blocks, wherein each pixel block comprises: a plurality of data lines; a plurality of pixel units arranged in an array form, wherein each pixel unit is coupled to one of the plurality of scanning lines and one of the plurality of data lines; a wireless receiving unit, configured to receive a data signal in a wireless manner wherein the wireless receiving unit comprises: a first antenna, configured to receive the data signal; and a resetting unit, coupled between the first antenna and a position selection unit, and configured to reset the data signal according to a clock signal; and the position selection unit, coupled between the wireless receiving unit and the plurality of data lines, and configured to transmit the data signal to one of the plurality of data lines according to a position selection signal; and at least one second antenna, wherein each second antenna is coupled to more than one of the plurality of resetting units in the plurality of pixel blocks, and is configured to generate the clock signal in a wireless sensing manner, and provide the clock signal to the coupled plurality of resetting units. 2. The pixel array structure according to claim 1 , further comprising a light shield pattern layer, wherein layout wiring of the second antenna is overlapping with an orthographic projection of the light shield pattern layer. 3. The pixel array structure according to claim 2 , wherein layout wiring of each first antenna is overlapping with an orthographic projection of the light shield pattern layer. 4. The pixel array structure according to claim 1 , wherein the wireless receiving unit further comprises: a rectification unit, coupled between the first antenna and the position selection unit, and configured to rectify the data signal, and output the rectified data signal to the position selection unit. 5. A pixel array structure, comprising: a plurality of scanning lines; and a plurality of pixel blocks, wherein each pixel block comprises: a plurality of data lines; a plurality of pixel units arranged in an array form, wherein each pixel unit is coupled to one of the plurality of scanning lines and one of the plurality of data lines: a wireless receiving unit, configured to receive a data signal in a wireless manner; and a position selection unit, coupled between the wireless receiving unit and the plurality of data lines, and configured to transmit the data signal to one of the plurality of data lines according to a position selection signal; wherein the wireless receiving unit comprises: a first antenna, configured to receive a truncated signal; a first transistor, wherein a first end of the first transistor is coupled to a power supply voltage, and is controlled by a clock signal; a second transistor, wherein a first end of the second transistor is coupled to a second end of the first transistor; a second end of the second transistor is coupled to a ground voltage; and a control end of the second transistor is coupled to the first antenna; and a third transistor, wherein a first end of the third transistor is coupled to the position selection unit; a second end of the third transistor is coupled to a ramp voltage; a control end of the third transistor is coupled to the first end of the second transistor; the third transistor generates the data signal according to the truncated signal and the ramp voltage, and the data signal is output to the position selection unit by the first end of the third transistor. 6. The pixel array structure according to claim 5 , wherein the wireless receiving unit further comprises: a second antenna, coupled to the control end of the first transistor, and configured to generate the clock signal in a wireless sensing manner. 7. The pixel array structure according to claim 1 , wherein the plurality of wireless receiving units of the plurality of pixel blocks receives the plurality of data signals by using receiving bands different from each other. 8. The pixel array structure according to claim 1 , wherein the plurality of wireless receiving units of a plurality of adjacent pixel blocks in the plurality of pixel blocks receives the plurality of data signals by using receiving bands different from each other. 9. A pixel array structure, comprising: a plurality of scanning lines; a plurality of data lines; a plurality of pixel units arranged in an array form, wherein each pixel unit is coupled to one of the plurality of scanning lines and one of the plurality of data lines; a plurality of first receiving units, respectively coupled to the plurality of data lines, wherein the plurality of first receiving units respectively receives a plurality of data signals in a wireless manner by using different receiving bands; and a plurality of second receiving units, respectively coupled to the plurality of scanning lines, wherein the plurality of second receiving units respectively receives a plurality of scanning signals in a wireless manner by using different receiving bands. 10. The pixel array structure according to claim 9 , wherein each first receiving unit comprises: a first charging circuit, configured to generate a first charging signal according to a first sensing signal; and a first discharging circuit, configured to generate a first discharging signal according to a second sensing signal, wherein the data signals correspond to the first charging signal and the first discharging signal. 11. The pixel array structure according to claim 6 , further comprising a light shield pattern layer, wherein layout wiring of the second antenna is overlapping with an orthographic projection of the light shield pattern layer. 12. The pixel array structure according to claim 11 , wherein layout wiring of the first antenna is overlapping with an orthographic projection of the light shield pattern layer. 13. The pixel array structure according to claim 5 , wherein the plurality of wireless receiving units of the plurality of pixel blocks receives the plurality of data signals by using receiving bands different from each other. 14. The pixel array structure according to claim 5 , wherein the plurality of wireless receiving units of a plurality of adjacent pixel blocks in the plurality of pixel blocks receives the plurality of data signals by using receiving bands different from each other.

Assignees

Inventors

Classifications

  • G09G3/22Primary

    using controlled light sources · CPC title

  • Pixel structures · CPC title

  • Use of wireless transmission of display information · CPC title

  • G09G3/20Primary

    for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

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What does patent US10276088B2 cover?
A pixel array structure includes a plurality of scanning lines and a plurality of pixel blocks. Each pixel block includes a plurality of data lines, a plurality of pixel units, a wireless receiving unit, and a position selection unit. The plurality of pixel units is arranged in an array form, and each pixel unit is coupled to one of the plurality of scanning lines and one of the plurality of da…
Who is the assignee on this patent?
Au Optronics Corp
What technology area does this patent fall under?
Primary CPC classification G09G3/22. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).