Thermal throttling of electronic devices

US10275001B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10275001-B2
Application numberUS-201514752512-A
CountryUS
Kind codeB2
Filing dateJun 26, 2015
Priority dateJun 26, 2015
Publication dateApr 30, 2019
Grant dateApr 30, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component. If the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component.

First claim

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What is claimed is: 1. A computing device, comprising: an electronic component; a temperature sensor thermally coupled to the electronic component; and a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component; wherein if the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least a performance guarantee for the electronic component; wherein the thermal management controller is to compute the throttling factor using an algorithm with three temperature thresholds comprising: a first temperature threshold that is a maximum junction temperature specified for the electronic component; a third temperature threshold that is the specified threshold, which corresponds with the performance guarantee; and a second temperature threshold between the first temperature threshold and the third temperature threshold, wherein a difference between the first temperature threshold and the second temperature threshold is equal to a measurement resolution of the temperature sensor. 2. The computing device of claim 1 , wherein a difference between the second temperature threshold and the third temperature threshold is equal to a measurement resolution of the temperature sensor. 3. The computing device of claim 1 , wherein if the temperature measurement is greater than the third temperature threshold but less than or equal to the second temperature threshold, the throttling factor is to reduce the performance of the electronic component to be at least the performance guarantee for the electronic component. 4. The computing device of claim 1 , wherein the throttling factor is a percentage of the maximum power which can be consumed on the electronic component. 5. The computing device of claim 1 , wherein the electronic component is a Random Access Memory (RAM) and the throttling factor is to cause a memory controller to limit a number of memory accesses to the RAM. 6. The computing device of claim 1 , wherein the algorithm is a Proportional-Integral-Derivative control algorithm. 7. The computing device of claim 1 , wherein the electronic component is a Dynamic Random Access Memory (DRAM) located within a same package as a Central Processing Unit (CPU) of the computing device. 8. The computing device of claim 1 , wherein the electronic component is a stacked Multiple Channel Dynamic Random Access Memory (MCDRAM). 9. The computing device of claim 1 , wherein if throttling of the electronic component is activated, a Central Processing Unit (CPU) of the computing device will deny requests from an Operating System (OS) of the computing device to boost performance by activating a turbo mode. 10. A method, comprising: receiving a temperature measurement from a temperature sensor, wherein the temperature measurement corresponds with a junction temperature of an electronic component; generating a throttling factor for the electronic component based on the temperature measurement; and in response to the throttling factor, reducing performance of the electronic component to be at least the performance guarantee for the electronic component if the temperature measurement is above a specified threshold; wherein generating the throttling factor comprises computing the throttling factor using an algorithm with three temperature thresholds comprising: a first temperature threshold that is a maximum junction temperature specified for the electronic component; a third temperature threshold that is the specified threshold, which corresponds with the performance guarantee; and a second temperature threshold between the first temperature threshold and the third temperature threshold; wherein a difference between the second temperature threshold and the third temperature threshold is equal to a measurement resolution of the temperature sensor. 11. The method of claim 10 , comprising, if the temperature measurement is greater than the third temperature threshold but less than or equal to the second temperature threshold, reducing performance of the electronic component to be at least the performance guarantee for the electronic component. 12. The method of claim 10 , comprising receiving a power budget for the electronic component and computing the throttling factor as a percentage of the maximum power consumable by the component. 13. The method of claim 10 , wherein the electronic component is a Random Access Memory (RAM) and reducing performance of the electronic component comprises limiting a number of memory accesses to the RAM over a specified time period. 14. The method of claim 10 , wherein generating the throttling factor comprises computing the throttling factor using a Proportional-Integral-Derivative algorithm. 15. A non-transitory computer-readable medium comprising instructions to direct a processor to: receive a temperature measurement from a temperature sensor, wherein the temperature measurement corresponds with a junction temperature of an electronic component; and generate a throttling factor for the electronic component based on the temperature measurement; wherein, if the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component; wherein to generate the throttling factor comprises to compute the throttling factor using an algorithm with three temperature thresholds comprising: a first temperature threshold that is a maximum junction temperature specified for the electronic component; a third temperature threshold that is the specified threshold, which corresponds with the performance guarantee; and a second temperature threshold between the first temperature threshold and the third temperature threshold; wherein a difference between the first temperature threshold and the second temperature threshold is equal to a measurement resolution of the temperature sensor. 16. The computer-readable medium of claim 15 , wherein a difference between the second temperature threshold and the third temperature threshold is equal to a measurement resolution of the temperature sensor.

Assignees

Inventors

Classifications

  • G06F1/206Primary

    comprising thermal management · CPC title

  • Cross-Sectional Technologies · mapped topic

  • Cross-Sectional Technologies · mapped topic

  • by lowering clock frequency · CPC title

  • Power saving characterised by the action undertaken · CPC title

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What does patent US10275001B2 cover?
Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a th…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/206. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).