Chassis switch using distributed backplane to interconnect line cards

US10271113B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10271113-B2
Application numberUS-201615181456-A
CountryUS
Kind codeB2
Filing dateJun 14, 2016
Priority dateDec 24, 2015
Publication dateApr 23, 2019
Grant dateApr 23, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention is to provide a chassis switch, which comprises a chassis for accommodating a designated number of line cards therein; a backplane installed on the back side of the chassis and having a plurality of connectors disposed thereon; at least one line card plugged into one of the connectors corresponding thereto via a front side of the chassis and each having an access switch chip adapted to switch local network signals and an interconnect switch chip adapted to switch the signals between ports of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnect switch chip respectively through the connectors, so as to enable each line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card.

First claim

Opening claim text (preview).

What is claimed is: 1. A chassis switch, comprising: a chassis defining an accommodating space, wherein a designated number of line cards and the designated number of switch cards are disposed in the accommodating space; a backplane installed on a back side of the chassis and having a plurality of connectors disposed thereon; at least one line card plugged into one of the plurality of connectors corresponding thereto via a front side of the chassis, wherein each of the at least one line card has an access switch chip adapted to switch local network signals; at least one switch card plugged into one of the plurality of connectors corresponding thereto via the front side of the chassis and connected to the at least one line card through the backplane, wherein each of the at least one switch card has an interconnection switch chip adapted to switch the signals between ports of the at least one line card, and an amount of the interconnection switch chip is equal to that of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnect switch chip respectively through the connectors of the at least one line card disposed on the backplane, so as to enable each of the at least one line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card; wherein the loop is a circuit board, at least one circuit is disposed on the circuit board, and two ends of each of the at least one circuit are connected to the corresponding ports of the access switch chip and the interconnection switch chip, respectively. 2. A chassis switch, comprising: a chassis defining an accommodating space, wherein a designated number of line cards are disposed in the accommodating space; a backplane installed on the back side of the chassis, wherein a plurality of connectors are disposed on the backplane; at least one line card plugged into one of the plurality of connectors corresponding thereto via a front side of the chassis, wherein each of the at least one line card has an access switch chip and an interconnect switch chip, the access switch chip is adapted to switch local network signals, and the interconnection switch chip is adapted to switch the signals between ports of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnect switch chip respectively through the connectors of the at least one line card disposed on the backplane, so as to enable each of the at least one line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card; wherein the loop is a circuit board, the circuit board has at least one circuit, and two ends of each of the at least one circuit are connected to the corresponding ports of the access switch chip and the interconnection switch chip, respectively. 3. A chassis switch, comprising: a chassis defining an accommodating space, wherein a designated number of line cards and the designated number of switch cards are disposed in the accommodating space; a backplane installed on the back side of the chassis, wherein the designated number of connectors are disposed on the backplane; at least one line card plugged into one of the connectors corresponding thereto via a front side of the chassis, wherein each of the at least one line card has an access switch chip adapted to switch local network signals; at least one switch card plugged into one of the connectors corresponding thereto via the front side of the chassis and connected to the at least one line card through the backplane, wherein each of the at least one switch card has an interconnection switch chip adapted to switch the signals between ports of the at least one line card, and an amount of the interconnection switch chip is equal to that of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnection switch chip respectively through the connectors of the at least one line card disposed on the backplane, so as to enable each of the at least one line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card; wherein the loop is a circuit board, the circuit board has at least one circuit, and two ends of each of the at least one circuit are connected to the corresponding ports of the access switch chip and the interconnection switch chip, respectively. 4. A chassis switch, comprising: a chassis defining an accommodating space, wherein a designated number of line cards are disposed in the accommodating space; a backplane installed on a back side of the chassis, and the designated number of connectors is disposed on the backplane; at least one line card plugged into one of the connectors corresponding thereto via a front side of the chassis, wherein each of the at least one line card has an access switch chip and an interconnection switch chip, the access switch chip is adapted to switch local network signals, and the interconnection switch chip is adapted to switch the signals between ports of the at least one line card; and a loop adapted to connect the corresponding ports of the access switch chip and the interconnection switch chip respectively through the connectors of the at least one line card disposed on the backplane, so as to enable each of the at least one line card plugged into the chassis switch to perform a local network switching function and a switching function between the at least one line card; wherein the loop is a circuit board, the circuit board has at least one circuit, and two ends of each of the at least one circuit are connected to the corresponding ports of the access switch chip and the interconnection switch chip, respectively.

Assignees

Inventors

Classifications

  • H04Q1/15Primary

    Backplane arrangements · CPC title

  • Details of selecting apparatus or arrangements · CPC title

  • H04L49/40Primary

    Constructional details, e.g. power supply, mechanical construction or backplane · CPC title

Patent family

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Frequently asked questions

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What does patent US10271113B2 cover?
The present invention is to provide a chassis switch, which comprises a chassis for accommodating a designated number of line cards therein; a backplane installed on the back side of the chassis and having a plurality of connectors disposed thereon; at least one line card plugged into one of the connectors corresponding thereto via a front side of the chassis and each having an access switch ch…
Who is the assignee on this patent?
Alpha Networks Inc
What technology area does this patent fall under?
Primary CPC classification H04Q1/15. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 23 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).