Individual DC and AC current shunting in optical receivers

Patent metadata

Field	Value
Publication number	US-10270538-B2
Application number	US-201815955609-A
Country	US
Kind code	B2
Filing date	Apr 17, 2018
Priority date	Oct 4, 2016
Publication date	Apr 23, 2019
Grant date	Apr 23, 2019

Abstract

A circuit may include amplifier circuitry configured to receive a current signal at an amplifier input node, convert the current signal to a voltage signal, and output the voltage signal at an amplifier output node. The circuit may also include overload circuitry configured to receive a replica DC input voltage and a replica DC output voltage. The overload circuitry may be further configured to detect that the current signal exceeds a threshold level based on the replica DC input voltage and the replica DC output voltage. In addition, the overload circuitry may be configured to, in response to and based on detecting that the current signal exceeds the threshold level, direct DC current of the current signal through a DC shunt path and direct AC current of the current signal through an AC shunt path. The AC shunt path may be different from the DC shunt path.

First claim

What is claimed is:

1. An optical receiver comprising:
a photodetector configured to receive an optical signal and convert the optical signal to a current signal; and
overload circuitry configured to direct DC current of the current signal through a DC shunt path if a DC component of the current signal exceeds a first threshold level; and direct AC current of the current signal through an AC shunt path if shunted DC current passing through the DC shunt path exceeds a second threshold level.

2. The optical receiver of claim 1 , wherein the photodetector is configured to output the current signal at an amplifier input node, further comprising amplifier circuitry coupled to the amplifier input node and configured to:
receive the current signal at the amplifier input node;
convert the current signal received at the amplifier input node to a voltage signal; and
output the voltage signal at an amplifier output node.

3. The optical receiver of claim 2 , wherein the overload circuitry is coupled to the amplifier input node and the overload circuitry is configured to:
receive a replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node;
receive a replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to a DC output voltage at the amplifier output node; and
detect that the DC component of the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage.

4. The optical receiver of claim 3 , wherein the amplifier circuitry includes:
replica bias circuitry coupled to the first overload node and configured to generate the replica DC input voltage based on a replica current; and
core amplifier circuitry coupled to the replica bias circuitry and the amplifier input node and configured to set the DC input voltage based on the replica current such that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

5. The optical receiver of claim 1 , wherein the DC shunt path includes a DC shunting transistor configured to shunt the DC current.

6. The optical receiver of claim 1 , wherein the overload circuitry comprises:
an error amplifier configured to detect that the DC component of the current signal exceeds the first threshold level, and activate a DC shunting transistor in response to detecting that the DC component of the current signal exceeds the first threshold level; and
AC shunting activation circuitry configured to activate the AC shunt path to shunt the AC current, wherein the AC shunting activation circuitry includes a driving transistor configured to drive the AC shunting activation circuitry and wherein the error amplifier output is coupled to a control terminal of the driving transistor such that the error amplifier controls activation of the AC shunt path by controlling a voltage at the control terminal of the driving transistor.

7. The optical receiver of claim 1 , further comprising a low-pass filter configured to filter a voltage signal to generate a replica DC output voltage.

8. The optical receiver of claim 1 , wherein the AC shunt path includes an AC shunting transistor configured to shunt AC current.

9. The optical receiver of claim 8 , wherein the overload circuitry further comprises:
AC shunting activation circuitry configured to activate the AC shunting transistor, the AC shunting activation circuitry including a driving transistor configured to drive the AC shunting activation circuitry; and
an error amplifier configured to detect that the current signal exceeds the threshold level based on a replica DC input voltage and a replica DC output voltage, wherein an error amplifier output of the error amplifier is coupled to a control terminal of the driving transistor such that the error amplifier controls activation of the AC shunting transistor by controlling a voltage at the control terminal of the driving transistor.

10. The optical receiver of claim 8 , wherein the AC shunting transistor is a first AC shunting transistor and the AC shunt path includes a second AC shunting transistor.

11. The optical receiver of claim 1 , wherein the overload circuitry is configured such that the DC current directed through the DC shunt path increases proportionally with increases in the DC component of the current signal.

12. A method comprising:
receiving an optical signal and converting the optical signal to a current signal;
directing DC current of the current signal through a DC shunt path in response to and based on detecting that a DC component of the current signal exceeds a first threshold level; and
directing AC current of the current signal through an AC shunt path in response to and based on detecting that shunted DC current passing through a DC shunt path exceeds a second threshold level, wherein the AC shunt path is different from the DC shunt path.

13. The method of claim 12 , further comprising:
converting the current signal received at an amplifier input node to a voltage signal;
outputting the voltage signal at an amplifier output node;
receiving a replica DC input voltage that corresponds to a DC input voltage at the amplifier input node;
receiving a replica DC output voltage that corresponds to a DC output voltage at the amplifier output node; and
detecting that the DC component of the current signal exceeds the first threshold level based on the replica DC input voltage and the replica DC output voltage.

14. The method of claim 13 , further comprising:
generating the replica DC input voltage based on a replica current; and
setting the DC input voltage based on the replica current such that the DC input voltage at the amplifier input node substantially matches the replica DC input voltage.

15. The method of claim 12 , further comprising activating a DC shunting transistor in response to detecting that the current signal exceeds the first threshold level and activating an AC shunting transistor in response to detecting that the shunted DC current exceeds the second threshold level.

16. The method of claim 12 , further comprising filtering, with a low-pass filter, a voltage signal to generate a replica DC output voltage.

17. A circuit comprising overload circuitry configured to:
direct DC current of a current signal through a DC shunt path in response to and based on detecting that a DC component of the current signal exceeds a first threshold level; and
direct AC current of the current signal through an AC shunt path in response to and based on detecting that shunted DC current passing through a DC shunt path exceeds a second threshold level, wherein the AC shunt path is different from the DC shunt path.

18. The circuit of claim 17 , further comprising amplifier circuitry coupled to the overload circuitry, the amplifier circuitry configured to:
receive a current signal at an amplifier input node;
convert the current signal received at the amplifier input node to a voltage signal; and
output the voltage signal at an amplifier output node.

19. The circuit of claim 18 , wherein the overload circuitry is further configured to:
receive a replica DC input voltage at a first overload node, wherein the replica DC input voltage corresponds to a DC input voltage at the amplifier input node;
receive a replica DC output voltage at a second overload node, wherein the replica DC output voltage corresponds to a DC output voltage at the amplifier output node; and

Assignees

• Finisar Corp

Inventors

• Jones Theron Lee
• Davis Richard Dean

Classifications

• H03F1/52

  Circuit arrangements for protecting such amplifiers {(monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74)} · CPC title

• H03F3/50

  Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower · CPC title

• H03F2200/426

  the amplifier comprising circuitry for protection against overload · CPC title

• H05K999/99

  Electricity · mapped topic

• H04B10/693

  Arrangements for optimizing the preamplifier in the receiver · CPC title