Multiplexer and integrated circuit using the same

Patent metadata

Field	Value
Publication number	US-10262902-B2
Application number	US-201615761628-A
Country	US
Kind code	B2
Filing date	Sep 21, 2016
Priority date	Oct 2, 2015
Publication date	Apr 16, 2019
Grant date	Apr 16, 2019

Abstract

The multiplexer includes a plurality of transmission gates each formed by four-terminal double insulated gate N-type and P-type field effect transistors connected in parallel. One of gates of the N-type gate field effect transistor is connected to a first threshold voltage control node, and a first resistor is connected between the first threshold voltage control node and a first threshold voltage control voltage source. One of gates of the P-type gate field effect transistor is connected to a second threshold voltage control node, and a second resistor is connected between the second threshold voltage control node and a second threshold voltage control voltage source.

First claim

What is claimed is:

1. A multiplexer comprising a plurality of pass transistors each formed by a four-terminal double insulated gate field effect transistor,
wherein one of gates of the field effect transistor is connected to a threshold voltage control node, and
a resistor is connected between the threshold voltage control node and a threshold voltage control voltage source;
wherein the field effect transistor is of N-type, and
the resistor is a nonlinear resistor having two high and low resistance values and is configured to take the high resistance value when a potential of the threshold voltage control node is above a reference potential based on a potential of the threshold voltage control power supply.

2. The multiplexer according to claim 1 , wherein
the field effect transistor is of P-type, and
the resistor is a nonlinear resistor having two high and low resistance values and is configured to take the low resistance value when a potential of the threshold voltage control node is above a reference potential based on a potential of the threshold voltage control power supply.

3. The multiplexer according to claim 1 , wherein
the nonlinear resistor is a four-terminal double insulated gate N-type field effect transistor,
one of gates is connected to a power supply connection node to which the threshold voltage control voltage source is connected, and
a source and a drain or a drain and a source are connected to the power supply connection node and the threshold voltage control node, respectively.

4. The multiplexer according to claim 2 , wherein
the nonlinear resistor is a four-terminal double insulated gate P-type field effect transistor,
one of gates is connected to a power supply connection node to which the threshold voltage control voltage source is connected, and
a source and a drain or a drain and a source are connected to the power supply connection node and the threshold voltage control node, respectively.

5. An integrated circuit comprising a multiplexer including a plurality of pass transistors each formed by a four-terminal double insulated gate field effect transistor,
wherein the multiplexer is configured such that one of gates of the field effect transistor is connected to a threshold voltage control node and a resistor is connected between the threshold voltage control node and a threshold voltage control voltage source.

6. The integrated circuit according to claim 5 , wherein
the field effect transistor is of N-type, and
the resistor is a nonlinear resistor having two high and low resistance values and is configured to take the high resistance value when a potential of the threshold voltage control node is above a reference potential based on a potential of the threshold voltage control power supply.

7. The integrated circuit according to claim 5 , wherein
the field effect transistor is of P-type, and
the resistor is a nonlinear resistor having two high and low resistance values and is configured to take the low resistance value when a potential of the threshold voltage control node is above a reference potential based on a potential of the threshold voltage control power supply.

8. The integrated circuit according to claim 6 , wherein
the nonlinear resistor is a four-terminal double insulated gate N-type field effect transistor,
one of gates is connected to a power supply connection node to which the threshold voltage control voltage source is connected, and
a source and a drain or a drain and a source are connected to the power supply connection node and the threshold voltage control node, respectively.

9. The integrated circuit according to claim 7 , wherein
the nonlinear resistor is a four-terminal double insulated gate P-type field effect transistor,
one of gates is connected to a power supply connection node to which the threshold voltage control voltage source is connected, and
a source and a drain or a drain and a source are connected to the power supply connection node and the threshold voltage control node, respectively.

10. A multiplexer comprising a plurality of transmission gates each formed by four-terminal double insulated gate N-type and P-type field effect transistors connected in parallel, wherein
one of gates of the N-type gate field effect transistor is connected to a first threshold voltage control node,
a first resistor is connected between the first threshold voltage control node and a first threshold voltage control voltage source,
one of gates of the P-type gate field effect transistor is connected to a second threshold voltage control node, and
a second resistor is connected between the second threshold voltage control node and a second threshold voltage control voltage source.

11. The multiplexer according to claim 10 , wherein
each of the first and second resistors is a nonlinear resistor having two high and low resistance values,
the first resistor is configured to take the high resistance value when a potential of the first threshold voltage control node is above a reference potential based on a potential of the first threshold voltage control voltage source, and
the second resistor is configured to be from the high resistance value to the low resistance value when a potential of the second threshold voltage control node exceeds a reference potential based on a potential of the second threshold voltage control voltage source.

12. The multiplexer according to claim 10 , wherein
the first resistor and the second resistor are four-terminal double insulated gate N-type and P-type field effect transistors, respectively,
the first resistor is configured such that one of gates is connected to a power supply connection node to which the first threshold voltage control voltage source is connected and a source and a drain or a drain and a source are connected to the power supply connection node and the first threshold voltage control node, respectively, and
the second resistor is configured such that one of gates is connected to a power supply connection node to which the second threshold voltage control voltage source is connected, and configured to be connected to the power supply connection node and the second threshold voltage control node.

13. An integrated circuit comprising a multiplexer including a plurality of transmission gates each formed by four-terminal double insulated gate N-type and P-type field effect transistors connected in parallel,
wherein the multiplexer is configured such that one of gates of the N-type gate field effect transistor is connected to a first threshold voltage control node, a first resistor is connected between the first threshold voltage control node and a first threshold voltage control voltage source, one of gates of the P-type gate field effect transistor is connected to a second threshold voltage control node, and a second resistor is connected between the second threshold voltage control node and a second threshold voltage control voltage source.

14. The integrated circuit according to claim 13 , wherein
each of the first and second resistors is a nonlinear resistor having two high and low resistance values,
the first resistor is configured to take the high resistance value when a potential of the first threshold voltage control node is above a reference potential based on a potential of the first threshold voltage control voltage source, and
the second resistor is configured to be from the high resistance value to the low resistance value when a potential of the second threshold voltage control node exceeds a reference potential based on a potential of the second threshold voltage control voltage source.

Assignees

• Aist

Inventors

• Sekigawa Toshihiro
• Hioki Masakazu
• Koike Hanpei

Classifications

• H03K19/094

  using field-effect transistors · CPC title

• H03K19/0944

  using MOSFET {or insulated gate field-effect transistors, i.e. IGFET}(H03K19/096 takes precedence) · CPC title

• H03K17/00

  Electronic switching or gating, i.e. not by contact-making and –breaking (gated amplifiers H03F3/72; switching arrangements for exchange systems using static devices H04Q3/52) · CPC title

• H03K19/1737

  using multiplexers (H03K19/1738 takes precedence) · CPC title

• H03K17/693 Primary

  Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title