Thermally coupled current limiter
US-9035701-B2 · May 19, 2015 · US
US10256774B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10256774-B2 |
| Application number | US-201715806280-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 7, 2017 |
| Priority date | Dec 31, 2013 |
| Publication date | Apr 9, 2019 |
| Grant date | Apr 9, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Devices and methods related to embedded sensors for dynamic error vector magnitude corrections. In some embodiments, a power amplifier (PA) can include a PA die and an amplification stage implemented on the PA die. The amplification stage can include an array of amplification transistors, with the array being configured to receive and amplify a radio-frequency (RF) signal. The PA can further include a sensor implemented on the PA die. The sensor can be positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors. The sensor can be substantially isolated from the RF signal.
Opening claim text (preview).
What is claimed is: 1. A power amplifier (PA) comprising: a PA die; an amplification stage implemented on the PA die, the amplification stage including an array of amplification transistors configured to receive and amplify a radio-frequency (RF) signal; a sensor implemented on the PA die, the sensor positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors, the sensor substantially isolated from the RF signal and the sensor being operated identical to the array of amplification transistors; and a dynamic error vector magnitude (DEVM) compensation circuit in communication with the amplifying transistors and the sensor and configured to provide a dynamic error vector magnitude compensation effect. 2. The power amplifier of claim 1 wherein the sensor includes a sensing transistor configured to be similar to at least some of the amplification transistors. 3. The power amplifier of claim 2 wherein the operating condition includes an operating temperature of the at least some of the amplification transistors. 4. The power amplifier of claim 3 wherein the operating temperature is obtained from a collector current associated with the sensing transistor. 5. The power amplifier of claim 2 wherein the dynamic error vector magnitude compensation circuit can generate one or more control signals based on a sensed signal from the sensor. 6. The power amplifier of claim 5 wherein base bias voltages are provided by the dynamic error vector magnitude compensation circuit to bases of the amplification transistors and the sensing transistor. 7. The power amplifier of claim 1 wherein the array of amplification transistors includes a plurality of amplification transistors arranged in a parallel configuration. 8. The power amplifier of claim 7 wherein the plurality of amplification transistors are grouped into a first group and a second group. 9. The power amplifier of claim 8 wherein the sensor is implemented between the first group of amplification transistors and the second group of amplification transistors. 10. The power amplifier of claim 1 wherein the sensor includes a bandgap reference device. 11. The power amplifier of claim 1 wherein the dynamic error vector magnitude compensation circuit is configured to provide the dynamic error vector magnitude compensation effect without affecting normal gain expansion characteristics at high radio-frequency power. 12. The power amplifier of claim 1 wherein the sensor includes a proportional to absolute temperature (PTAT) device. 13. A method for fabricating a power amplifier (PA), the method comprising: providing or forming a semiconductor wafer; forming a plurality of amplification stages on the semiconductor wafer, each amplification stage including an array of amplification transistors configured to receive and amplify a radio-frequency (RF) signal; forming a plurality of sensors on the semiconductor wafer such that at least one sensor is positioned relative to each array of amplification transistors to allow sensing of an operating condition representative of the amplification transistors, the sensor substantially isolated from the radio-frequency signal and the sensor being operated identical to the array of amplification transistors; and coupling a dynamic error vector magnitude compensation circuit to the plurality of amplification stages and the plurality of sensors, the dynamic error vector magnitude compensation circuit configured to provide a dynamic error vector magnitude compensation effect. 14. The method of claim 13 further comprising singulating the semiconductor wafer to yield a plurality of power amplifier die. 15. A radio-frequency (RF) module comprising: a packaging substrate configured to receive a plurality of components; and a power amplifier (PA) die mounted on the packaging substrate, the power amplifier die including a power amplifier circuit with an amplification stage including an array of amplification transistors configured to receive and amplify a radio-frequency (RF) signal, the power amplifier die further including a sensor positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors, the sensor substantially isolated from the radio-frequency signal and the sensor being operated identical to the array of amplification transistors, the amplification stage and the sensor coupled to a dynamic error vector magnitude compensation circuit configured to provide a dynamic error vector magnitude compensation effect. 16. The radio-frequency module of claim 15 wherein the power amplifier circuit is configured to amplify a radio-frequency signal for a wireless local area network (WLAN). 17. The radio-frequency module of claim 15 wherein the sensor is configured to track an operating temperature of the amplification stage. 18. The radio-frequency module of claim 17 further comprising the dynamic error vector magnitude compensation circuit. 19. The radio-frequency module of claim 18 wherein the dynamic error vector magnitude compensation circuit is further configured to provide the dynamic error vector magnitude compensation effect based on a sensed signal representative of the operating temperature. 20. The radio-frequency module of claim 19 wherein the compensation of the dynamic error vector magnitude effect is provided by the dynamic error vector magnitude compensation circuit providing bias voltages to bases of the amplification transistors and the sensing transistor.
the amplifier being protected to temperature influence · CPC title
Output signals are combined by switching a plurality of paralleled power amplifiers to a common output · CPC title
Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal · CPC title
with control of the polarisation voltage or current, e.g. gliding Class A · CPC title
the amplifier being a radio frequency amplifier · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.