Pulsed laser diode driver
US-2017085057-A1 · Mar 23, 2017 · US
US10256605B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10256605-B2 |
| Application number | US-201715826630-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 29, 2017 |
| Priority date | Oct 14, 2016 |
| Publication date | Apr 9, 2019 |
| Grant date | Apr 9, 2019 |
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The present disclosure relates to systems and circuits that may facilitate sub-5 nanosecond laser diode operation. An example system includes a trigger source, a laser diode, a first field effect transistor and a second field effect transistor. The laser diode is coupled to a supply voltage and a drain terminal of the first field effect transistor. A source terminal of the first field effect transistor is coupled to ground and a gate terminal of the first field effect transistor is coupled to the trigger source. A drain terminal of the second field effect transistor is coupled to the supply voltage. A source terminal of the second field effect transistor and a gate terminal of the second field effect transistor are coupled to ground. In an example embodiment, the first field effect transistor and the second field effect transistor comprise gallium nitride (GaN).
Opening claim text (preview).
What is claimed is: 1. A system comprising: a trigger source; a laser diode; a first field effect transistor, wherein the laser diode is coupled to a supply voltage and a drain terminal of the first field effect transistor, wherein a source terminal of the first field effect transistor is coupled to ground, wherein a gate terminal of the first field effect transistor is coupled to the trigger source; and a second field effect transistor, wherein a drain terminal of the second field effect transistor is coupled to the supply voltage, wherein a source terminal of the second field effect transistor and a gate terminal of the second field effect transistor are coupled to ground. 2. The system according to claim 1 , further comprising a controller, wherein the controller comprises at least one processor and a memory, wherein the at least one processor executes instructions stored in the memory so as to carry out operations. 3. The system according to claim 2 , wherein the operations comprise causing the trigger source to provide a trigger pulse signal so as to cause the laser diode to emit a laser pulse. 4. The system according to claim 3 , wherein the laser pulse comprises a pulse width of less than 2.5 nanoseconds. 5. The system according to claim 1 , wherein the first field effect transistor and the second field effect transistor comprise gallium nitride (GaN). 6. The system according to claim 1 , wherein the first field effect transistor and the second field effect transistor comprise silicon carbide (SiC). 7. The system according to claim 1 , wherein at least one of the first field effect transistor or the second field effect transistor comprise a surface-mount device. 8. The system according to claim 1 , wherein the supply voltage is greater than 100 volts. 9. The system according to claim 1 , wherein at least one of the first field effect transistor or the second field effect transistor comprises a high electron mobility transistor (HEMT). 10. The system according to claim 1 , wherein the second field effect transistor is configured to reduce oscillations in the system. 11. The system according to claim 1 , wherein the second field effect transistor is configured to reduce or eliminate a negative voltage between a drain terminal and a source terminal of the first field effect transistor. 12. The system according to claim 1 , further comprising a return diode connected between the drain terminal of the first field effect transistor and the supply voltage. 13. A circuit comprising: a laser diode; a first field effect transistor, wherein the laser diode is coupled to a supply voltage and a drain terminal of the first field effect transistor, wherein a source terminal of the first field effect transistor is coupled to ground; and a second field effect transistor, wherein a drain terminal of the second field effect transistor is coupled to the supply voltage, wherein a source terminal of the second field effect transistor and a gate terminal of the second field effect transistor are coupled to ground. 14. The circuit of claim 13 , wherein at least one of the first field effect transistor or the second field effect transistor comprises a high electron mobility transistor (HEMT). 15. The circuit of claim 13 , wherein at least one of the first field effect transistor or the second field effect transistor comprises a high-speed high-power transistor. 16. The circuit of claim 13 , wherein the supply voltage is greater than 100 volts. 17. The circuit of claim 13 , further comprising a trigger source coupled to a gate terminal of the first field effect transistor. 18. The circuit of claim 17 , wherein the trigger source is operable to provide a trigger pulse so as to cause the laser diode to emit a laser light pulse. 19. The circuit of claim 18 , wherein the laser light pulse has a pulse width of less than 2.5 nanoseconds. 20. The circuit of claim 17 , wherein the trigger source is operable to provide a pulse train of trigger pulses so as to cause the laser diode to emit a laser pulse train of laser light pulses, wherein each laser pulse has a pulse width of less than 2.5 nanoseconds.
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