Capacitor

Patent metadata

Field	Value
Publication number	US-10256045-B2
Application number	US-201615209128-A
Country	US
Kind code	B2
Filing date	Jul 13, 2016
Priority date	Feb 7, 2014
Publication date	Apr 9, 2019
Grant date	Apr 9, 2019

Abstract

A capacitor that includes a porous metal base material, a first buffer layer formed by an atomic layer deposition method on the porous metal base material, a dielectric layer formed by an atomic layer deposition method on the first buffer layer, and an upper electrode formed on the dielectric layer.

First claim

The invention claimed is:

1. A capacitor comprising:
a porous-metal base material having a central high porosity part and a lateral low porosity party, the high porosity part having a porosity of at least 25%, the low porosity part having a porosity of not more than 60% of the porosity of the high porosity part;
at least one first buffer layer on the porous metal base material;
a dielectric layer on the first buffer layer; and
an upper electrode on the dielectric layer.

2. The capacitor according to claim 1 , wherein the first buffer layer comprises one of a metal nitride and a metal oxynitride.

3. The capacitor according to claim 1 , wherein the first buffer layer comprises a metal.

4. The capacitor according to claim 1 , further comprising a second buffer layer between the dielectric layer and the electrode.

5. The capacitor according to claim 4 , wherein at least one of the first buffer layer and the second buffer layer comprises one of a metal nitride and a metal oxynitride.

6. The capacitor according to claim 4 , wherein at least one of the first buffer layer and the second buffer layer comprises a metal.

7. The capacitor according to claim 1 , further including first and second terminal electrodes.

8. The capacitor according to claim 7 , wherein the first terminal electrode is electrically connected to the porous metal base material and the second terminal electrode is electrically connected to the upper electrode.

9. The capacitor according to claim 7 , wherein the low porosity part is adjacent at least one of the terminal electrodes.

10. A method for manufacturing a capacitor, the method comprising:
forming at least one first buffer layer on a porous metal base material having a central high porosity part and a lateral low porosity part, the high porosity part having a porosity of at least 25%, the low porosity part having a porosity which is not more than 60% of the porosity of the high porosity part;
forming a dielectric layer on the first buffer layer; and
forming an electrode on the dielectric layer.

11. The method for manufacturing a capacitor according to claim 10 , wherein the first buffer layer is formed by an atomic layer deposition method.

12. The method for manufacturing a capacitor according to claim 10 , wherein the dielectric layer is formed by an atomic layer deposition method.

13. The method for manufacturing a capacitor according to claim 10 , wherein the first buffer layer and the dielectric layer are formed by an atomic layer deposition method.

14. The method for manufacturing a capacitor according to claim 10 , wherein the first buffer layer comprises one of a metal nitride and a metal oxynitride.

15. The method for manufacturing a capacitor according to claim 10 , wherein the first buffer layer comprises a metal.

16. The method for manufacturing a capacitor according to claim 10 , further comprising forming a second buffer layer between the dielectric layer and the electrode.

17. The method for manufacturing a capacitor according to claim 16 , wherein the second buffer layer is formed by an atomic layer deposition method.

18. The method for manufacturing a capacitor according to claim 16 , wherein the first buffer layer and the second buffer layer are formed by an atomic layer deposition method.

19. The method for manufacturing a capacitor according to claim 16 , wherein the first buffer layer, the dielectric layer and the second buffer layer are formed by an atomic layer deposition method.

20. The method for manufacturing a capacitor according to claim 16 , wherein at least one of the first buffer layer and the second buffer layer comprises one of a metal nitride and a metal oxynitride.

21. The method for manufacturing a capacitor according to claim 16 , wherein at least one of the first buffer layer and the second buffer layer comprises a metal.

Assignees

• Murata Manufacturing Co

Inventors

• Saeki Hiromasa
• Inoue Noriyuki
• Arakawa Takeo
• Iwaji Naoki

Classifications

• H01G9/04

  Electrodes {or formation of dielectric layers thereon} · CPC title

• H01G9/07 Primary

  Dielectric layers · CPC title

• H01G9/055

  Etched foil electrodes · CPC title

• H01G9/0032

  formation of the dielectric layer · CPC title

• H01G9/052

  Sintered electrodes · CPC title