Replica cascode bias voltage-controlled oscillators

Patent metadata

Field	Value
Publication number	US-10250263-B2
Application number	US-201515114394-A
Country	US
Kind code	B2
Filing date	May 12, 2015
Priority date	May 12, 2015
Publication date	Apr 2, 2019
Grant date	Apr 2, 2019

Abstract

Embodiments relate to a voltage oscillator (VCO) that uses a replica bias circuit to generate a cascode bias voltage. The VCO generate an output periodic signal having a frequency and phase that is less or not susceptible to voltage swings by using a bias voltage generated in a replica bias circuit that replicates a voltage-to-current converter in the VOC. The bias voltage is generated and regulated according to a power supply voltage that supplies power to the VCO to account for voltage variations in the power supply voltage.

First claim

What is claimed is:

1. A voltage oscillator comprising:
a voltage-to-current converter configured to generate a control current responsive to receiving a control voltage, the voltage-to-current converter comprising a first transistor and a second transistor, a drain of the first transistor coupled to a source of the second transistor and a gate of the second transistor biased by a bias voltage;
a current controlled oscillator coupled to the voltage-to-current converter to receive the control current and to generate a periodic output signal having a frequency corresponding to the control current; and
a bias voltage generation circuit coupled to the voltage-to-current converter, the bias voltage generation circuit comprising a replica bias circuit configured to generate a replica voltage corresponding to a voltage at the source of the second transistor.

2. The voltage oscillator of claim 1 , wherein the bias voltage generation circuit further comprises an amplifier coupled to replica bias circuit to receive the output voltage and a reference voltage, the amplifier configured to generate the bias voltage representing an amplified difference between the replica voltage and the reference voltage.

3. The voltage oscillator of claim 2 , wherein the reference voltage equals to the replica voltage.

4. The voltage oscillator of claim 1 , wherein the replica bias circuit comprises a third transistor and a fourth transistor coupled to the third transistor, a gate of the first transistor is coupled to a gate of the third transistor, a drain of the third transistor is coupled to a source of the fourth transistor, and the gate of the second transistor is coupled to a gate of the fourth transistor.

5. The voltage oscillator of claim 4 , wherein the replica bias circuit comprises a fifth transistor, a drain and a gate of the fifth transistor are coupled to the drain of the fourth transistor.

6. The voltage oscillator of claim 5 , wherein the amplifier comprises:
a sixth transistor;
a seventh transistor having a gate coupled to a gate of the sixth transistor, and a source of the seventh transistor receiving the replica voltage;
an eighth transistor having a drain coupled to a drain of the sixth transistor; and
a ninth transistor having a gate coupled to a gate of the eighth transistor and having a drain coupled to a drain of the seventh transistor.

7. The voltage oscillator of claim 6 , wherein a gate to source voltage of the sixth transistor and a gate to source voltage of the seventh transistor determines the reference voltage, and the gate to source voltage of the sixth transistor is greater than the gate to source voltage of the seventh transistor.

8. A method of generating a periodic signal, comprising:
generating, by a voltage-to-current converter, a control current responsive to receiving a control voltage;
providing the generated control current to a current controlled oscillator to generate the periodic signal;
generating, by a bias voltage generation circuit, a replica voltage corresponding to a voltage between a first transistor of the voltage-to-current converter and a second transistor of the voltage-to-current converter in a cascode configuration responsive to receiving the control voltage at a gate of the first transistor;
generating, by the bias voltage generation circuit, a bias voltage by amplifying a difference between the replica voltage and a reference voltage; and
applying the generated bias voltage to a gate of the second transistor of the voltage-to-current converter and a gate of a third transistor in the bias voltage generation circuit, the third transistor being a replica of the second transistor of the voltage-to-current converter.

9. The method of claim 8 , further comprising:
providing the reference voltage to a non-inverting input of an amplifier in the bias generation circuit; and
providing the reference voltage to an inverting input of the amplifier, the reference voltage corresponding to a drain to source voltage of the first transistor.

10. The method of claim 8 , further comprising:
controlling a current through a fourth transistor of the bias generation circuit by providing the control voltage to the gate of the fourth transistor; and
providing at least part of the current through the fourth transistor to a source of the third transistor in the bias voltage generation circuit.

11. The method of claim 10 , further comprising:
conducting a replica current through the third transistor in the bias voltage generation circuit;
generating a mirror current mirroring the replica current at the current mirror responsive to receiving the replica current; and
providing the mirror current to the amplifier.

12. The method of claim 11 , further comprising:
shifting the replica voltage by a gate-to-source voltage of a fifth transistor of the amplifier; and
providing the mirror current to a sixth transistor of the amplifier to amplify the difference between the replica voltage and the reference voltage.

13. The method of claim 12 , further comprising generating, by the bias voltage generation circuit, a difference between a gate to source voltage of the sixth transistor and a gate to source voltage of the fifth transistor determining the reference voltage, the gate-to-source voltage of the sixth transistor greater than the gate-to-source voltage of the fifth transistor.

Assignees

• Lattice Semiconductor Corp

Inventors

• Luo Kexin
• Yin Rui
• Wang Xiaofeng
• Yuan Jie
• Wu Qiming
• Song Fei
• Kim Min-Kyu

Classifications

• H03K3/03

  Astable circuits · CPC title

• H03L7/00 Primary

  Automatic control of frequency or phase; Synchronisation · CPC title

• H03K3/011

  Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title

• H03L7/099 Primary

  concerning mainly the controlled oscillator of the loop · CPC title