Electromagnetic interference blocking system

US10250046B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10250046-B2
Application numberUS-201615251651-A
CountryUS
Kind codeB2
Filing dateAug 30, 2016
Priority dateAug 30, 2016
Publication dateApr 2, 2019
Grant dateApr 2, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge storage element and a second charge storage element. A switching regulator operates with a switching cycle having an on-time and an off-time; and the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator.

First claim

Opening claim text (preview).

What is claimed is: 1. An adiabatically-switched electromagnetic interference protection circuit comprising: a first charge storage element and a second charge storage element, the first and second charge storage elements being provided between an input for receiving a rectified input voltage and an output for connecting to a switching regulator; wherein the protection circuit is selectively operable between a first mode in which the first charge storage element is coupled to the input and de-coupled from the output; a second mode in which the second charge storage element is coupled to the input and de-coupled from the output; and a third mode in which the first charge storage element and the second charge storage element are each de-coupled from both the input and the output and a controller adapted to output a control signal to switch the protection circuit between the first mode and the second mode via the third mode; wherein the control signal is adapted to maintain the protection circuit in the third mode for a delay-time. 2. The protection circuit as claimed in claim 1 , wherein the switching regulator is configured to operate with a switching cycle having an on-time and an off-time; and wherein the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator. 3. The protection circuit as claimed in claim 1 , wherein the control signal is arranged to cause a transition between the first mode and the second mode to start during a period of time when the rectified input voltage is increasing. 4. The protection circuit as claimed in claim 1 , wherein the control signal comprises a plurality of logic signals. 5. The protection circuit as claimed in claim 1 , comprising a first pair of switches coupled to the first and second charge storage elements and a second pair of switches coupled to the first and second charge storage elements. 6. The protection circuit as claimed in claim 5 , wherein the control signal comprises a first logic signal adapted to operate the first pair of switches and a second logic signal adapted to operate the second pair of switches. 7. The protection circuit as claimed in claim 5 , wherein the first pair of switches comprises a first switch coupled between the input of the protection circuit and the first charge storage element; and a second switch coupled between the second charge storage element and the output of the protection circuit; and wherein the second pair of switches comprises a third switch coupled between the input of the protection circuit and the second charge storage element; and a fourth switch coupled between the first charge storage element and the output of the protection circuit. 8. The protection circuit as claimed in claim 1 , wherein the controller comprises a time-delay circuit coupled to a plurality of logic gates. 9. The protection circuit as claimed in claim 1 , wherein the delay-time ranges for from about 0.5 microsecond to about 1 microsecond. 10. A converter circuit comprising a rectifier for providing a rectified input voltage, a switching regulator comprising a power switch; and an adiabatically-switched electromagnetic interference protection circuit coupled to the rectifier and to the switching regulator; wherein the protection circuit comprises a first charge storage element and a second charge storage element, the first and second charge storage elements being provided between an input for receiving the rectified input voltage and an output for connecting to the switching regulator; wherein the protection circuit is selectively operable between a first mode in which the first charge storage element is coupled to the input and de-coupled from the output; a second mode in which the second charge storage element is coupled to the input and de-coupled from the output; and a third mode in which the first charge storage element and the second charge storage element are each de-coupled from both the input and the output and a controller adapted to output a control signal to switch the protection circuit between the first mode and the second mode via the third mode; wherein the control signal is adapted to maintain the protection circuit in the third mode for a delay-time. 11. The converter circuit as claimed in claim 10 , wherein the rectifier comprises at least two switches. 12. The converter circuit as claimed in claim 10 , wherein the protection circuit comprises a first pair of switches coupled to the first and second charge storage elements and a second pair of switches coupled to the first and second charge storage elements; and wherein one switch among the first and second pair of switches is the power switch of the switching regulator. 13. An electromagnetic interferences protection method comprising the steps of: providing an adiabatically-switched electromagnetic interference protection circuit comprising a first charge storage element and a second charge storage element between an input for receiving a rectified input voltage and an output for connecting to a switching regulator; wherein the protection circuit is selectively operable between a first mode in which the first charge storage element is coupled to the input and de-coupled from the output; a second mode in which the second charge storage element is coupled to the input and de-coupled from the output; and a third mode in which the first charge storage element and the second charge storage element are each de-coupled from both the input and the output; and switching the protection circuit between the first mode and the second mode via the third mode by maintaining the protection circuit in the third mode for a delay-time. 14. The method as claimed in claim 13 , wherein the switching regulator is configured to operate with a switching cycle having an on-time and an off-time; and wherein switching the protection circuit between the first state and the second state is performed during the off-time of a switching cycle of the switching regulator. 15. The method as claimed in claim 13 , wherein switching the protection circuit between the first mode and the second mode starts during a period of time when the rectified input voltage is increasing. 16. The method as claimed in claim 13 further comprising the steps of: charging the first charge storage element in the first mode and discharging the first charge storage element in the second mode. 17. The method as claimed in claim 13 further comprising the steps of: charging the second charge storage element in the second mode and discharging the second charge storage element in the first mode. 18. The method as claimed in claim 16 , wherein charging the storage element is started when the rectified input voltage reaches a value equal to the voltage across the capacitor. 19. The method as claimed in claim 13 , further comprising the step of: providing a first pair of switches coupled to the first and second charge storage elements and a second pair of switches coupled to the first and second charge storage elements. 20. The method as claimed in claim 19 , further comprising the steps of: generating a first logic signal to control the first pair of switches and generating a second logic signal to control the second pair of switches.

Assignees

Inventors

Classifications

  • H02M1/44Primary

    Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

  • using discharge tubes without control electrode or semiconductor devices without control electrode · CPC title

  • including safety or protection arrangements · CPC title

  • Electricity · mapped topic

  • H02J7/0026Primary

    Electricity · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10250046B2 cover?
An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge st…
Who is the assignee on this patent?
Dialog Semiconductor Inc
What technology area does this patent fall under?
Primary CPC classification H02M1/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 02 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).