Power supply and power supplying method thereof for data programming operation

Patent metadata

Field	Value
Publication number	US-10249346-B2
Application number	US-201715649632-A
Country	US
Kind code	B2
Filing date	Jul 13, 2017
Priority date	Jul 13, 2017
Publication date	Apr 2, 2019
Grant date	Apr 2, 2019

Abstract

A power supply includes a plurality of charge pump circuits. The charge pump circuits commonly generate an output voltage for programming a write data to the memory apparatus. Wherein, number of the charge pump circuits enabled for generating the output voltage is determined according to number of programmed bit(s) of the write data.

First claim

What is claimed is:

1. A power supply for data programming operation, adapted for a memory apparatus, comprising:
a plurality of charge pump circuits, commonly generating an output voltage for programming a write data to the memory apparatus, wherein each of the charge pump circuits comprises:
a plurality of charge pump units coupled in series; and
a switch, coupled between a last stage charge pump unit and output ends of the charge pump circuits, and controlled by a corresponding bit of the write data to be turned-on or cut-off, wherein the output voltage is output to the output ends of the charge pump circuits when the switch is turned on, and the output voltage is not output to the output ends of the charge pump circuits when the switch is cut off,

wherein number of the charge pump circuits enabled for generating the output voltage is determined according to number of programmed bit(s) of the write data.

2. The power supply for data programming operation as claimed in claim 1 , wherein number of the charge pump circuits equals number of the bits of the write data, and the number of the charge pump circuits enabled for generating the output voltage equals the number of the programmed bit(s) of the write data.

3. The power supply for data programming operation as claimed in claim 2 , wherein the charge pump circuits respectively receive the bits of the write data, and each of the charge pump circuits is enabled or disabled according to corresponding received bit of the write data.

4. The power supply for data programming operation as claimed in claim 3 , wherein each of the charge pump circuits further comprises:
a clock gating circuit, receiving the corresponding received bit of the write data and a clock signal, determining whether to pass the clock signal to each of the charge pump circuits or not according to the corresponding received bit of the write data.

5. The power supply for data programming operation as claimed in claim 4 , wherein each of the plurality of charge pump units receives an output signal of the clock gating circuit.

6. The power supply for data programming operation as claimed in claim 1 , further comprising:
a comparator, receiving the output voltage, and comparing the output voltage with a reference voltage to generate an enable signal,
wherein the enable signal is used to disable all of the charge pump circuits if the output voltage is not smaller than the reference voltage.

7. The power supply for data programming operation as claimed in claim 1 , further comprising:
a voltage divider, coupled to the charge pump circuits, receiving and dividing the output voltage and generating a divided voltage; and
a comparator, receiving the divided voltage, and comparing the divided voltage with a reference voltage to generate an enable signal,
wherein the enable signal is used to disable all of the charge pump circuits if the divided voltage is not smaller than the reference voltage.

8. The power supply for data programming operation as claimed in claim 7 , wherein the voltage divider comprises:
a first resistor, coupled between the output ends of the charge pump circuits and a first end; and
a second resistor, coupled between the first end and a reference ground,
wherein the first end provides the divided voltage to the comparator.

9. A power supplying method for data programming operation, adapted for a memory apparatus, comprising:
providing a plurality of charge pump circuits to commonly generate an output voltage for programming a write data to the memory apparatus, wherein each of the charge pump circuits comprises a plurality of charge pump units coupled in series and a switch coupled between a last stage charge pump unit and output ends of the charge pump circuits;
receiving write data with a plurality of bits; and
determining number of the charge pump circuits enabled for generating the output voltage according to number of programmed bit(s) of the write data, comprising:
controlling the switch of each of the charge pump circuits to turn-on or cut-off an output path of each of the charge pump circuits according to each of the corresponding received bits of the write data, wherein the output voltage is output to the output ends of the charge pump circuits when the switch is turned on, and the output voltage is not output to the output ends of the charge pump circuits when the switch is cut off.

10. The power supplying method as claimed in claim 9 , wherein number of the charge pump circuits equals number of the bits of the write data, and the number of the charge pump circuits enabled for generating the output voltage equals the number of the programmed bit(s) of the write data.

11. The power supplying method as claimed in claim 9 , wherein step of determining the number of the charge pump circuits enabled for generating the output voltage according to the number of programmed bit(s) of the write data comprises:
providing the charge pump circuits respectively receive the bits of the write data; and
disabling or enabling each of the charge pump circuits according to each of corresponding received bits of the write data.

12. The power supplying method as claimed in claim 11 , wherein step of disabling or enabling each of the charge pump circuits according to each of the corresponding received bits of the write data comprises:
providing a clock gating circuit for determining whether to pass a clock signal to each of the charge pump circuits or not according to the corresponding received bit of the write data.

13. The power supplying method as claimed in claim 10 , further comprising:
comparing the output voltage with a reference voltage to generate an enable signal; and
disabling all of the charge pump circuits if the output voltage is not smaller than the reference voltage.

14. The power supplying method as claimed in claim 10 , further comprising:
dividing the output voltage to generate a divided voltage;
comparing the divided voltage with a reference voltage to generate an enable signal; and
disabling all of the charge pump circuits if the output voltage is not smaller than the reference voltage.

Assignees

• Winbond Electronics Corp

Inventors

• Michael Oron
• Kim Dae Hyun

Classifications

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G11C16/30

  Power supply circuits · CPC title

• G11C5/145 Primary

  Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor (G11C5/141 takes precedence) · CPC title

• G05F1/625 Primary

  wherein it is irrelevant whether the variable actually regulated is AC or DC · CPC title

• G11C16/12

  Programming voltage switching circuits · CPC title