Iterative forward error correction decoding for FM In-Band On-Channel radio broadcasting systems

Patent metadata

Field	Value
Publication number	US-10248496-B2
Application number	US-201414266907-A
Country	US
Kind code	B2
Filing date	May 1, 2014
Priority date	May 3, 2013
Publication date	Apr 2, 2019
Grant date	Apr 2, 2019

Abstract

A method for processing a digital signal includes: receiving a plurality of protocol data units, each having a header including a plurality of control word bits; and a plurality of audio frames, each including a cyclic redundancy check code; decoding the protocol data units using an iterative decoding technique, wherein the iterative decoding technique uses a soft output decoding algorithm for iterations after the first iteration; and using decoded cyclic redundancy check codes to flag the audio frames containing errors. A receiver that implements the method is also provided.

First claim

What is claimed is:

1. A radio receiver comprising:
physical layer circuitry to receive a digital radio broadcast signal;
processing circuitry configured to:
receive a plurality of protocol data units of the digital radio broadcast signal, each protocol data unit having a header including a plurality of control word bits, and a plurality of audio frames or data packets, each including a cyclic redundancy check code;
wherein the processing circuit includes an audio decoder configured to:
decode the protocol data units using an iterative decoding technique that refines bit decoding information passed between an inner error correction code and an outer error correction code over at least one iteration of the decoding technique, wherein the iterative decoding technique comprises:
for a first decoding iteration, decode the inner error correction code using Viterbi decoding as an inner decoding;
pass decoding information from the inner decoding to the outer error correction code;
use decoded cyclic redundancy check codes to detect audio frames or data packets that contain errors and flag the audio frames or data packets containing errors that require further decoding iterations; and
change the inner decoding for the further decoding iterations of flagged audio frames or flagged data packets to include decoding the inner error correction code using at least one of soft output decoding or a List Viterbi decoding; and

codec circuitry configured to produce an audio signal using audio frames of the protocol data units, or a data signal using data packets of the protocol data units, decoded using the iterative decoding technique.

2. The radio receiver of claim 1 , wherein for the further decoding iterations, the audio decoder is configured to change the inner decoding to include a soft output decoding that includes at least one of the following: Soft Output Viterbi decoding, Maximum A Posteriori (MAP) decoding, Maxlog MAP decoding, List Sequence MAP decoding, Maxlog List decoding, an A Posteriori Probability decoding, or an M-Algorithm decoding with M states for each decoding stage k, wherein M and k are integers and M<2k−1.

3. The radio receiver of claim 2 , wherein the audio decoder is configured to use soft outputs of the inner error correction decoding to identify possible erasure symbols for erasure decoding of an outer Reed-Solomon code.

4. The radio receiver of claim 1 , wherein the decoding information comprises a Reed-Solomon code included in the audio frames or data. packets.

5. The radio receiver of claim 1 , wherein the audio decoder is configured to change the inner decoding to include List Viterbi decoding, and wherein the information passed between an inner error correction code and an outer error correction code limits the number of decoding attempts by the List Viterbi decoding.

6. The radio receiver of claim 1 , wherein the audio decoder is configured to change the inner decoding for the further decoding iterations to use a soft output decoding that comprises an M-algorithm, and wherein a value of M in the M-algorithm is adapted as a function of branch metrics, path metrics, cyclic redundancy check errors, or other signal quality metrics.

7. The radio receiver of claim 1 , wherein the audio decoder is configured to use a cyclic redundancy check error threshold on the first Viterbi decoding to flag a protocol data unit as failed, and stop the decoding if more than a predetermined number of cyclic redundancy checks fail on a first decoding pass.

8. The radio receiver of claim 1 , wherein the audio decoder is configured to perform the inner error correction code of the iterative decoding technique using a tailbiting decoder having an overlap spanning at least a path memory past the header.

9. The radio receiver of claim 1 , wherein the audio decoder is configured to vary a limit on maximum list size of the iterations of the iterative decoding technique as a function of a number of correct or corrected cyclic redundancy checks.

10. The radio receiver of claim 1 , wherein the audio decoder is configured to convolutionally encode the protocol data unit with protocol control information control word bits present, and the protocol control information control word bits are removed from the protocol data unit after convolution decoding but before cyclic redundancy check processing of each audio frame or data packet.

11. The radio receiver of claim 10 , wherein the audio decoder is configured to remove the protocol control information control word bits in iterative decoding steps before cyclic redundancy check processing and restored prior to subsequent convolutional decoding in each iteration.

12. The radio receiver of claim 1 ,
wherein the audio decoder is configured to perform list decoding on error-flagged audio frames or data packets with known start or known end states.

13. The radio receiver of claim 1 ,
wherein the audio decoder is configured to continue iterative decoding until all audio frames or data packets having known start and end states are processed.

14. The radio receiver of claim 13 ,
wherein the audio decoder is configured to perform list decoding on error-flagged audio frames or data packets without known start states or known end states.

15. The radio receiver of claim 14 , wherein the audio decoder is configured to extend decoding of audio frames or data packets without known start states or known end states into adjacent audio frames or data packets by a path memory before the start or end of an audio frame where the state is unknown.

16. The radio receiver of claim 12 , wherein the audio decoder is configured to use audio frames with correct cyclic redundancy checks to establish either starting states or ending states, or starting states and ending states, of any adjacent audio frames or data packets flagged with cyclic redundancy check errors.

17. The radio receiver of claim 1 ,
wherein the audio decoder is configured to:
use the header as part of an iterative-decoding consistency check on incoming audio frames or data packets; and
if unexpected consistency values were detected in the header, perform additional decoding iterations until the expected values were received or a predetermined number of decoding attempts were made.

18. The radio receiver of claim 2 , wherein the audio decoder is configured to enhance decoding performance in a backward compatible manner using a concatenated Reed-Solomon outer code.

19. The radio receiver of claim 18 , wherein the audio decoder is configured to insert the concatenated Reed-Solomon parity bytes in the protocol data units in a modem frame, along with the size of the Reed Solomon codewords and the number of parity symbols per codeword.

20. The radio receiver of claim 18 , wherein the audio decoder is configured to apply interleaving between an inner convolutional code and the Reed-Solomon code is applied when time diversity is used, an integer number of whole Reed-Solomon codewords cover each time diverse component.

21. The radio receiver of claim 3 including a first polynomial generator to flag the audio frames or data packets containing errors that require further decoding iterations, and a different polynomial generator to compute a second cyclic redundancy check for a second cyclic redundancy check byte in each audio frame or data packet to improve the error detection probability.

Assignees

• Ibiquity Digital Corp

Inventors

• Kroeger Brian W
• Peyla Paul J

Classifications

• G06F11/1004 Primary

  to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title

• H03M13/4115 Primary

  list output Viterbi decoding · CPC title

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title

• H04L1/0072

  Error control for data other than payload data, e.g. control data · CPC title

• H04L1/0061

  Error detection codes · CPC title