Digital pre-distortion for multiple-power amplifier transceivers
US-2024429953-A1 · Dec 26, 2024 · US
US10243595B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10243595-B2 |
| Application number | US-201615742698-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 1, 2016 |
| Priority date | Jul 9, 2015 |
| Publication date | Mar 26, 2019 |
| Grant date | Mar 26, 2019 |
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Disclosed are a detection method and device for a digital intermediate frequency processing system. The method comprises: forming and transmitting excitation data to a digital intermediate frequency processing system; collecting detection data formed by processing the excitation data by the digital intermediate frequency processing system; and performing a bit-by-bit comparison on the detection data and reference data to form a detection result. Further provided is a computer storage medium.
Opening claim text (preview).
The invention claimed is: 1. A method for detecting a Digital Intermediate Frequency (DIF) processing system, comprising: forming excitation data; sending the excitation data to a downlink of the DIF processing system; collecting detection data formed by the DIF processing system processing the excitation data; and comparing the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink. 2. The method according to claim 1 , further comprising: configuring a detection parameter, wherein the detection parameter comprises an algorithm parameter, the algorithm parameter being consistent with an algorithm parameter forming the reference data, wherein the detection parameter is a configuration parameter for the DIF processing system to process the excitation data. 3. The method according to claim 1 , wherein the excitation data is a periodic sequence sent periodically. 4. An apparatus for detecting a Digital Intermediate Frequency (DIF) processing system, comprising: a memory having stored instructions; a processor configured to execute the instructions for implementing a plurality of units comprising: an excitation data forming unit, configured to form excitation data; a sending unit, configured to send the excitation data to a downlink of the DIF processing system; a collection unit, configured to collect detection data formed by the DIF processing system processing the excitation data; and a comparison unit, configured to compare the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink. 5. The apparatus according to claim 4 , wherein the processor is further configured to execute the instructions for implementing: a configuration unit, configured to configure a detection parameter, wherein the detection parameter comprises an algorithm parameter, the algorithm parameter being consistent with an algorithm parameter forming the reference data, wherein the detection parameter is a configuration parameter for the DIF processing system to process the excitation data. 6. The apparatus according to claim 4 , wherein the excitation data is a periodic sequence sent periodically. 7. A non-transitory computer storage medium, the non-transitory computer storage medium storing computer-executable instructions, the computer-executable instructions being used to execute a method for detecting a Digital Intermediate Frequency (DIF) processing system, wherein the method comprises: forming excitation data; sending the excitation data to a downlink of the DIF processing system; collecting detection data formed by the DIF processing system processing the excitation data; and comparing the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink.
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