Detection method and device for digital intermediate frequency processing system, and computer storage medium

US10243595B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10243595-B2
Application numberUS-201615742698-A
CountryUS
Kind codeB2
Filing dateJul 1, 2016
Priority dateJul 9, 2015
Publication dateMar 26, 2019
Grant dateMar 26, 2019

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  1. Title

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  2. Abstract

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Abstract

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Disclosed are a detection method and device for a digital intermediate frequency processing system. The method comprises: forming and transmitting excitation data to a digital intermediate frequency processing system; collecting detection data formed by processing the excitation data by the digital intermediate frequency processing system; and performing a bit-by-bit comparison on the detection data and reference data to form a detection result. Further provided is a computer storage medium.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for detecting a Digital Intermediate Frequency (DIF) processing system, comprising: forming excitation data; sending the excitation data to a downlink of the DIF processing system; collecting detection data formed by the DIF processing system processing the excitation data; and comparing the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink. 2. The method according to claim 1 , further comprising: configuring a detection parameter, wherein the detection parameter comprises an algorithm parameter, the algorithm parameter being consistent with an algorithm parameter forming the reference data, wherein the detection parameter is a configuration parameter for the DIF processing system to process the excitation data. 3. The method according to claim 1 , wherein the excitation data is a periodic sequence sent periodically. 4. An apparatus for detecting a Digital Intermediate Frequency (DIF) processing system, comprising: a memory having stored instructions; a processor configured to execute the instructions for implementing a plurality of units comprising: an excitation data forming unit, configured to form excitation data; a sending unit, configured to send the excitation data to a downlink of the DIF processing system; a collection unit, configured to collect detection data formed by the DIF processing system processing the excitation data; and a comparison unit, configured to compare the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink. 5. The apparatus according to claim 4 , wherein the processor is further configured to execute the instructions for implementing: a configuration unit, configured to configure a detection parameter, wherein the detection parameter comprises an algorithm parameter, the algorithm parameter being consistent with an algorithm parameter forming the reference data, wherein the detection parameter is a configuration parameter for the DIF processing system to process the excitation data. 6. The apparatus according to claim 4 , wherein the excitation data is a periodic sequence sent periodically. 7. A non-transitory computer storage medium, the non-transitory computer storage medium storing computer-executable instructions, the computer-executable instructions being used to execute a method for detecting a Digital Intermediate Frequency (DIF) processing system, wherein the method comprises: forming excitation data; sending the excitation data to a downlink of the DIF processing system; collecting detection data formed by the DIF processing system processing the excitation data; and comparing the detection data with reference data bit by bit to form a detection result, wherein the detection data comprises: a downlink detection signal formed by sequentially performing Digital Up Converter (DUC) processing, Crest Factor Reduction (CFR) processing and Digital Pre-Distortion (DPD) processing on the excitation data via the downlink.

Assignees

Inventors

Classifications

  • by soft clipping · CPC title

  • H04B1/0475Primary

    with means for limiting noise, interference or distortion (H04B1/0483 takes precedence) · CPC title

  • by heterodyning; by beat-frequency comparison · CPC title

  • H04B17/391Primary

    Modelling the propagation channel · CPC title

  • Shaping networks in transmitter or receiver, e.g. adaptive shaping networks · CPC title

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What does patent US10243595B2 cover?
Disclosed are a detection method and device for a digital intermediate frequency processing system. The method comprises: forming and transmitting excitation data to a digital intermediate frequency processing system; collecting detection data formed by processing the excitation data by the digital intermediate frequency processing system; and performing a bit-by-bit comparison on the detection…
Who is the assignee on this patent?
Sanechips Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04B1/0475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).