Chip resistance element and chip resistance element assembly

Patent metadata

Field	Value
Publication number	US-10242774-B2
Application number	US-201715835291-A
Country	US
Kind code	B2
Filing date	Dec 7, 2017
Priority date	Apr 27, 2017
Publication date	Mar 26, 2019
Grant date	Mar 26, 2019

Abstract

A chip resistance element includes a base substrate having a first surface and a second surface opposing each other, two sides connecting the first surface and the second surface to each other, and two end surfaces connecting the first surface and the second surface to each other; a resistive layer disposed on the second surface; and a first terminal, a second terminal, and a third terminal disposed to be respectively connected to the resistive layer and to be separated from each other on the second surface. The third terminal having a second surface portion disposed between the first terminal and the second terminal on the second surface and a side portion connected to and disposed on one of the two sides of the base substrate.

First claim

What is claimed is:

1. A chip resistance element comprising:
a base substrate having
a first surface and a second surface opposing each other in a thickness direction,
two sides opposing each other in a width direction and connecting the first surface and the second surface to each other, and
two end surfaces opposing each other in a length direction and connecting the first surface and the second surface to each other;

a resistive layer disposed on the second surface; and
a first terminal, a second terminal, and a third terminal disposed to be respectively connected to the resistive layer and to be separated from each other on the second surface,
wherein the first and second terminals are arranged at respective ends in the length direction on the resistive laver, and
the third terminal has
a second surface portion disposed in a width direction across the second surface and between the first terminal and the second terminal, and
a side portion connected to and disposed on one of the two sides of the base substrate.

2. The chip resistance element of claim 1 , wherein the first terminal and the second terminal respectively cover one end portion and the other end portion of the resistive layer and is in contact with the second surface.

3. The chip resistance element of claim 1 , wherein the first terminal and the second terminal are respectively extended to the end surfaces and cover corners at which the second surface and the end surfaces meet.

4. The chip resistance element of claim 1 , wherein the side portion is extended to a corner at which the first surface and the side meet.

5. The chip resistance element of claim 1 , further comprising a protective layer disposed on the first surface.

6. The chip resistance element of claim 1 , wherein the first, second, and third terminals respectively include
first, second, and third electrode layers, and
first, second, and third plated layers disposed on the first, second, and third electrode layers.

7. The chip resistance element of claim 6 , wherein a portion of the third electrode layer disposed on the side of the base substrate is formed in a deposition operation.

8. The chip resistance element of claim 1 , wherein the first and second terminals are formed in a plating operation after a printing operation.

9. A chip resistance element assembly comprising:
a circuit board having a plurality of electrode pads; and
a chip resistance element disposed on the circuit board and electrically connected to the plurality of electrode pads,
wherein the chip resistance element includes
a base substrate having
a first surface and a second surface opposing each other in a thickness direction,
two sides opposing each other in a width direction and connecting the first surface and the second surface to each other, and
two end surfaces opposing each other in a length direction and connecting the first surface and the second surface to each other,

a resistive layer disposed on the second surface, and
a first terminal, a second terminal, and a third terminal disposed to be respectively connected to the resistive layer and to be separated from each other on the second surface,
wherein the first and second terminals are arranged at respective ends in the length direction on the resistive laver, and
the third terminal has
a second surface portion disposed in a width direction across the second surface and between the first terminal and the second terminal, and
a side portion connected to and disposed on one of the two sides of the base substrate.

10. The chip resistance element assembly of claim 9 , wherein the first terminal and the second terminal respectively cover one end portion and the other end portion of the resistive layer and is in contact with the second surface.

11. The chip resistance element assembly of claim 9 , wherein the first terminal and the second terminal are respectively extended to the end surfaces and cover corners at which the second surface and the end surfaces meet.

12. The chip resistance element assembly of claim 9 , wherein the side portion is extended to a corner at which the first surface and the side meet.

13. The chip resistance element assembly of claim 9 , further comprising a protective layer disposed on the first surface.

14. The chip resistance element assembly of claim 9 , wherein the first, second, and third terminals respectively include first, second, and third electrode layers, and first, second, and third plated layers disposed on the first, second, and third electrode layers.

15. The chip resistance element assembly of claim 9 , wherein a solder electrically connecting the electrode pads and the third terminal is disposed on a surface of the side portion.

Assignees

• Samsung Electro Mech

Inventors

• Nam Jung Min
• Yoo Doo Ho
• Kim Young Key

Classifications

• H01C1/148 Primary

  the terminals embracing or surrounding the resistive element (H01C1/142 takes precedence) · CPC title

• H01C7/00

  Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material (consisting of loose powdered or granular material H01C8/00; resistors having potential barriers, e.g. field-effect resistors, H10D1/40 - H10D1/43, H10K10/10; semiconductor devices sensitive to electromagnetic or corpuscular radiation, e.g. photoresistors, H10F30/00; magnetic field controlled resistors H10N50/10; bulk negative resistance effect devices H10N80/00) · CPC title

• H01C1/142

  the terminals or tapping points being coated on the resistive element · CPC title

• H05K1/167

  incorporating printed resistors · CPC title

• H01C1/01

  Mounting; Supporting · CPC title