Reconfigurable graphics processor for performance improvement

Patent metadata

Field	Value
Publication number	US-10242418-B2
Application number	US-201113993696-A
Country	US
Kind code	B2
Filing date	Nov 21, 2011
Priority date	Nov 21, 2011
Publication date	Mar 26, 2019
Grant date	Mar 26, 2019

Abstract

Power gating a portion of a graphics processor may be used to improve performance or to achieve a power budget. A processor granularity, such as a slice or subslice, may be gated.

First claim

What is claimed is:

1. A method comprising:
determining a performance measure of a graphics processor in a larger configuration without power gating;
power gating one of two hardware portions of a graphics processor;
determining performance of the graphics processor with power gating;
determining in the graphics processor if the graphics processor performance was improved by power gating compared to graphics processor performance without power gating to determine the effect of graphics processor power gating by comparing performance of the graphics processor with and without any power gating; and
transitioning to a smaller configuration, with power gating, only if leakage savings of the smaller configuration exceed dynamic power cost due to increased frequency operation in the smaller configuration.

2. The method of claim 1 including power gating a slice.

3. The method of claim 1 including power gating a subslice.

4. The method of claim 1 including changing operating frequency after power gating.

5. The method of claim 1 including power gating the portion off only after all pending tasks on the portion have completed.

6. The method of claim 1 including power gating for power budgeting.

7. The method of claim 1 including checking power budget after power gating.

8. The method of claim 1 including determining target switching capacitance and target application ratio.

9. The method of claim 8 including using one of silicon measurements or energy monitor counters.

10. A non-transitory computer readable medium storing instructions for execution by a computer to:
determining a performance measure of a graphics processor in a larger configuration without power gating;
power gating one of two hardware portions of a graphics processor;
determining performance of the graphics processor with power gating;
determining in the graphics processor if the graphics processor performance was improved by power gating compared to graphics processor performance without power gating to determine the effect of graphics processor power gating by comparing performance of the graphics processor with and without any power gating; and
transitioning to a smaller configuration, with power gating, only if leakage savings of the smaller configuration exceed dynamic power cost due to increased frequency operation in the smaller configuration.

11. The medium of claim 10 further storing instructions to power gate a slice.

12. The medium of claim 10 further storing instructions to power gate a subslice.

13. The medium of claim 10 further storing instructions to change operating frequency after power gating.

14. The medium of claim 10 further storing instructions to power gate the portion off only after all pending tasks on the portion have completed.

15. The medium of claim 10 further storing instructions to power gate for power budgeting.

16. The medium of claim 10 further storing instructions to check power budget after power gating.

17. The medium of claim 10 further storing instructions to determine target switching capacitance and target application ratio.

18. The medium of claim 17 further storing instructions to use one of silicon measurements or energy monitor counters.

19. A graphics processor comprising:
first and second independently gateable hardware portions of the graphics processor; and
logic to power gate one of two portions of a graphics processor and to determine a performance measure of a graphics processor in a larger configuration without power gating, determine performance of the graphics processor with power gating, determine if the graphics processor performance was improved by power gating compared to performance without power gating to determine the effect of graphics processor power gating by comparing performance of the graphics processor with and without any power gating and transition to a smaller configuration, with power gating, only if leakage savings of the smaller configuration exceed dynamic power cost due to increased frequency operation in the smaller configuration.

20. The graphics processor of claim 19 , said logic to power gate a slice.

21. The graphics processor of claim 19 , said logic to power gate a subslice.

22. The graphics processor of claim 19 , said logic to change operating frequency after power gating.

23. The graphics processor of claim 19 , said logic to power gate the portion off only after all pending tasks on the portion have completed.

24. The graphics processor of claim 19 , said logic to power gate for power budgeting.

25. The graphics processor of claim 19 , said logic to check power budget after power gating.

26. The graphics processor of claim 19 , said logic to determine target switching capacitance and target application ratio.

27. The graphics processor of claim 26 , said logic to use one of silicon measurements or energy monitor counters.

Assignees

• Kaburlasos Nikos
• Samson Eric C
• Intel Corp

Inventors

• Kaburlasos Nikos
• Samson Eric C

Classifications

• G09G2360/08

  Power processing, i.e. workload management for processors involved in display operations, such as CPUs or GPUs · CPC title

• G06F1/324 Primary

  by lowering clock frequency · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title