Multi-stacked electronic device with defect-free solder connection

Patent metadata

Field	Value
Publication number	US-10237977-B2
Application number	US-201815880155-A
Country	US
Kind code	B2
Filing date	Jan 25, 2018
Priority date	Jul 16, 2014
Publication date	Mar 19, 2019
Grant date	Mar 19, 2019

Abstract

A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.

First claim

What is claim is:

1. A method of forming an electronic structure, comprising:
providing a first electronic component, the first electronic component comprising a lateral, outside, downwardly extending, first leadframe;
providing a second electronic component, the second electronic component comprising a lateral, upwardly extending second leadframe;
placing the first electronic component above and in close proximity with the second electronic component to form a stacked electronic device, wherein the second leadframe extends upwardly, laterally inside of, and vertically overlapping with, the first leadframe, wherein the first and second leadframes include vertically overlapping portions in a contact region, and the first leadframe includes a lower portion spaced from said overlapping portions and defining a solder connection region;
joining the first leadframe of the first electronic component to the second leadframe of the second electronic component using a non-solder metal joining process to form a joint in the contact region directly between and physically joining together the overlapping portions of the first and second leadframes, wherein the joint is located outside the solder connection region; and
using a soldering process to form a solder connection in the solder connection region, below and spaced from the joint, to solder the stacked electronic device to a soldering surface, the solder connection including a solder material having a melting point lower than a melting point of the joint.

2. The method according to claim 1 , wherein the solder material is maintained within the solder connection region.

3. The method according to claim 1 , wherein the solder connection is below the joint.

4. The method according to claim 1 , wherein the solder connection extends laterally outside the second electronic component.

5. The method according to claim 1 , wherein the solder connection is beneath the leadframes of the second electronic component, and extends laterally inward of the first and second leadframes.

6. A method of forming an electronic structure, comprising:
forming a stacked electronic device comprised of first and second electronic components, the first electronic component comprising a lateral, outside, downwardly extending, first leadframe, and the second electronic component comprising a lateral, upwardly extending second leadframe, including
placing the first electronic component above and in close proximity with the second electronic component to form the stacked electronic device, wherein the second leadframe extends upwardly, laterally inside of, and vertically overlapping with, the first leadframe, wherein the first and second leadframes include vertically overlapping portions in a contact region, and the first leadframe includes a lower portion spaced from said overlapping portions and defining a solder connection region; and
joining the first leadframe of the first electronic component to the second leadframe of the second electronic component using a non-solder metal joining process to form a joint in the contact region directly between and physically joining together the overlapping portions of the first and second leadframes, wherein the joint is located outside the solder connection region; and

using a soldering process to form a solder connection in the solder connection region, to solder the stacked electronic device to a soldering surface, the solder connection including a solder material having a melting point lower than a melting point of the joint, and wherein the solder connection is below and spaced from the joint, is beneath the leadframe of the second electronic component, and extends laterally inward of the first and second leadframes.

7. The method according to claim 6 , wherein the solder material of the solder connection includes a lead free solder.

8. The method according to claim 6 , wherein the substrate includes an epoxy dielectric material.

9. The method according to claim 6 , wherein the substrate includes an epoxy dielectric material with a metal foil on an upper surface of the epoxy dielectric material.

10. The method according to claim 6 , wherein the solder connection extends laterally outside the stacked electronic device.

Assignees

• IBM

Inventors

• Ang Ai Kiar
• Lauri Michael

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W70/40

  Leadframes · CPC title

• H10W90/811

  Multiple chips on leadframes · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W70/442

  of multiple leadframes in a single chip · CPC title