Method and device for operating a circuit arrangement, circuit arrangement

Patent metadata

Field	Value
Publication number	US-10237155-B2
Application number	US-201515314544-A
Country	US
Kind code	B2
Filing date	May 18, 2015
Priority date	May 30, 2014
Publication date	Mar 19, 2019
Grant date	Mar 19, 2019

Abstract

The invention relates to a method for operating an electric circuit arrangement (1) which has a low-voltage sub-network (2) and a high-voltage sub-network (3). A test signal is transmitted from one of the sub-networks (2, 3) to the other sub-network (3, 2) in order to detect a fault depending on the reception of the signal in the other sub-network (3, 2) and to switch the circuit arrangement (1) to a safe state. A data bus (5), which connects a low-voltage control unit (6) of the low-voltage sub-network (2) to a high-voltage control unit (7) of the high-voltage sub-network (3), is operated with a maximum bus load at least temporarily as a test signal so that data packets are transmitted at fixed time intervals, and a fault is detected depending on a delay of the last received data packet, said delay being detected by the control unit (7, 6) receiving the data packets.

First claim

The invention claimed is:

1. A method for operating an electric circuit arrangement ( 1 ) which has a low-voltage sub-network ( 2 ) and a high-voltage sub-network ( 3 ), wherein a test signal is transmitted from one of the sub-networks ( 2 , 3 ) to the other sub-network ( 3 , 2 ) in order to detect a fault depending on the reception of the signal in the other sub-network ( 3 , 2 ) and to switch the circuit arrangement ( 1 ) to a safe state, characterized in that a data bus ( 5 ), which connects a low-voltage control unit ( 6 ) of the low-voltage sub-network ( 2 ) to a high-voltage control unit ( 7 ) of the high-voltage sub-network ( 3 ), is operated with a maximum bus load at least temporarily as a test signal so that data packets are transmitted at fixed time intervals, and a fault is detected depending on a delay of the last received data packet, said delay being detected by the control unit ( 7 , 6 ) receiving the data packets.

2. The method according to claim 1 , characterized in that a fault is detected if the delay of the last received data packet is greater than the fixed time interval between two consecutive transmitted data packets.

3. The method according to claim 1 , characterized in that empty packets are transmitted to adjust the maximum bus load.

4. The method according to claim 1 , characterized in that a monoflop ( 10 ) is used to detect the time intervals.

5. The method according to claim 1 , characterized in that no data packets are transmitted over a predetrminable period of time.

6. The method according to claim 1 , characterized in that a further method for detecting faults is carried out in the low-voltage sub-network ( 2 ) or the high-voltage sub-network ( 3 ), wherein, when detecting a fault by the further method, the data bus ( 5 ) is connected to ground in order to force an interruption in the packet transmission.

7. A device ( 8 ) for operating an electric circuit arrangement ( 1 ), which has a low-voltage sub-network ( 2 ) and a high-voltage sub-network ( 3 ), said device comprising a safety device ( 9 ), which transmits a test signal from one of the sub-networks ( 2 ) into the other sub-network ( 3 ), in order to detect a fault based on reception of the test signal and to switch the circuit arrangement to a safe state, characterized in that the safety device ( 9 ) operates a data bus ( 5 ), which connects a low-voltage control unit ( 6 ) of the low-voltage sub-network ( 2 ) to a high-voltage control unit ( 7 ) of the high-voltage sub-network ( 3 ), with a maximum bus load at least temporarily as a test signal so that data packets are transmitted at fixed time intervals, and a fault is detected based on a delay of the last received data packet, said delay being detected by the control unit ( 7 , 6 ) receiving the data packets.

8. The device according to claim 7 , characterized in that the safety device ( 9 ) includes a monoflop ( 10 ).

9. The device according to claim 8 , wherein the safety device ( 9 ) includes a signal generating device ( 11 ).

10. A circuit arrangement comprising a low-voltage sub-network ( 2 ) and a high-voltage sub-network ( 3 ), characterized by a device according to claim 7 .

11. The circuit arrangement according to claim 10 , wherein the circuit arrangement is part of a motor vehicle.

Assignees

• Bosch Gmbh Robert

Inventors

• Richter Tobias
• Butzmann Stefan
• Aldinger Stefan

Classifications

• H04L43/0811

  by checking connectivity · CPC title

• H04L43/0817

  by checking functioning · CPC title

• H04L43/0858 Primary

  One way delays · CPC title

• H04L43/50

  Testing arrangements · CPC title

• H04L2012/40273

  the transportation system being a vehicle · CPC title