Display device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-10236330-B2
Application number	US-201715426606-A
Country	US
Kind code	B2
Filing date	Feb 7, 2017
Priority date	Mar 23, 2016
Publication date	Mar 19, 2019
Grant date	Mar 19, 2019

Abstract

A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.

First claim

What is claimed is:

1. A display device comprising:
a plurality of pixel electrodes that are provided in a display region for displaying an image;
a common electrode that is disposed above the plurality of pixel electrodes;
a light-emitting element layer that is interposed between the plurality of pixel electrodes and the common electrode; and
a circuit layer that is configured of a plurality of layers reaching to a peripheral region which is an outside of the display region from the display region,
wherein the circuit layer includes a plurality of thin film transistors in each of the display region and the peripheral region,
the plurality of thin film transistors provided in the peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode,
the first source electrode is connected with a first contact plug,
the first drain electrode is connected with a second contact plug,
the plurality of thin film transistors provided in the display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode,
the second staggered thin film transistor is positioned at a higher layer in comparison with the first staggered thin film transistor,
the first contact plug passes through a layer in which the second channel layer is disposed,
the plurality of layers configuring the circuit layer further include a metal layer that is formed of the same material at a position of the same layer as the second gate electrode of the second staggered thin film transistor to overlap at least an end portion of the first channel layer of the first staggered thin film transistor, and
the metal layer is formed to be integrated with the first contact plug.

2. The display device according to claim 1 ,
wherein the second staggered thin film transistor provided in the display region is connected to control a supply amount of a current to each of the plurality of pixel electrodes.

3. The display device according to claim 1 ,
wherein the plurality of layers configuring the circuit layer include a conductive layer that is formed by injecting ions into the low-temperature polysilicon layer in the display region, and
the conductive layer is positioned at the same layer as the first channel layer of the first staggered thin film transistor, and is positioned at a lower layer in comparison with the second staggered thin film transistor.

4. The display device according to claim 3 ,
wherein the conductive layer has a size overlapping a whole of the second staggered thin film transistor.

5. The display device according to claim 3 ,
wherein the plurality of layers configuring the circuit layer further include a second conductive layer that is used as the other electrode at an opposite position to the conductive layer in a case where the conductive layer is used as one electrode of a capacitor in the display region, and
the second conductive layer is positioned at the same layer as the first gate electrode of the first staggered thin film transistor, and is located below the second staggered thin film transistor.

6. The display device according to claim 1 ,
wherein the plurality of thin film transistors provided in the display region further include a first staggered thin film transistor at a position of the same layer as the first staggered thin film transistor of the peripheral region.

7. A display device comprising:
a plurality of pixel electrodes that are provided in a display region;
a common electrode above the plurality of pixel electrodes;
a light-emitting element layer between the plurality of pixel electrodes and the common electrode; and
a circuit layer including a plurality of layers in the display region and a peripheral region which is outside of the display region, wherein
the circuit layer includes a first thin film transistor in the peripheral region and a second thin film transistor in the display region,
the first thin film transistor has a first channel layer configured of low-temperature polysilicon,
the first channel layer is not positioned between a first drain electrode and a first gate electrode, the first channel layer is not positioned between a first source electrode and the first gate electrode,
the first source electrode is connected with a first contact plug,
the first drain electrode is connected with a second contact plug,
the second thin film transistor has a second channel layer configured of an oxide semiconductor,
the second channel layer is not positioned between a second drain electrode and a second gate electrode,
the second channel layer is not positioned between a second source electrode and the second gate electrode, and,
the second channel layer is positioned higher than the first channel layer,
a first height between a top of the first contact plug and the first channel layer is larger than a second height between a top surface of the second source electrode and the second channel layer, and
the circuit layer further includes a metal layer that is formed of the same material at a position of the same layer as the second gate electrode and overlaps at least an end portion of the first channel layer.

8. The display device according to claim 7 ,
wherein the circuit layer includes a first conductive layer having ionized low-temperature polysilicon layer in the display region, and
the first conductive layer and the first channel layer include same material, and
the first conductive layer is located lower than the second channel layer.

9. The display device according to claim 8 ,
wherein the first conductive layer is overlapped with the second channel layer.

10. The display device according to claim 8 ,
wherein the circuit layer further includes a second conductive layer facing the first conductive layer, and
the second conductive layer is lower than the second channel layer.

11. The display device according to claim 7 ,
wherein the plurality of thin film transistors provided in the display region further includes a third thin film transistor having a third channel layer, wherein
the third channel layer has the same composition as the first channel layer.

12. The display device according to claim 7 , wherein
the metal layer is contacted with the first contact plug.

Assignees

• Japan Display Inc

Inventors

• Maruyama Satoshi

Classifications

• H01L27/3262 Primary

  Electricity · mapped topic

• H01L29/7869

  Electricity · mapped topic

• H01L27/3265

  Electricity · mapped topic

• H01L29/78675

  Electricity · mapped topic

• H01L27/1222

  Electricity · mapped topic