Decimal load immediate instruction

US10235170B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10235170-B2
Application numberUS-201615281181-A
CountryUS
Kind codeB2
Filing dateSep 30, 2016
Priority dateSep 30, 2016
Publication dateMar 19, 2019
Grant dateMar 19, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An instruction generates a value for use in processing within a computing environment. The instruction obtains a sign control associated with the instruction, and shifts an input value of the instruction in a specified direction by a selected amount to provide a result. The result is placed in a first designated location in a register, and the sign, which is based on the sign control, is placed in a second designated location of the register. The result and the sign provide a signed value to be used in processing within the computing environment.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for facilitating processing within a computing environment, the computer program product comprising: a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: obtaining an instruction for execution, the instruction to generate a value without obtaining the value from memory, the value for use in processing within the computing environment, the instruction having associated therewith a sign control to be used to provide a sign of the value to be generated by the instruction; executing the instruction, the executing comprising: obtaining the sign control; shifting an input value, provided by the instruction absent loading from memory, in a specified direction by a selected amount to provide a result; placing the result in a first designated location in a register; and including the sign, based on the sign control, in a second designated location of the register, the result and the sign providing a signed value to be used in processing within the computing environment, the signed value being generated absent loading from memory, wherein use of memory bandwidth of the computing environment is reduced. 2. The computer program product of claim 1 , wherein the obtaining the sign control comprises obtaining the sign control from a field of the instruction, and wherein based on the sign control being a first value, the sign is positive, and based on the sign control being a second value, the sign is negative. 3. The computer program product of claim 1 , wherein the executing further comprises: obtaining the input value from an immediate field of the instruction; checking validity of the input value; and performing the shifting, based on the checking indicating the input value is valid. 4. The computer program product of claim 1 , wherein the specified direction is left. 5. The computer program product of claim 1 , wherein the executing further comprises obtaining the selected amount from an immediate field of the instruction. 6. The computer program product of claim 1 , wherein the first designated location is a location of a magnitude of a signed packed decimal format in the register. 7. The computer program product of claim 1 , wherein the register is specified using at least one field of the instruction. 8. The computer program product of claim 7 , wherein the at least one field comprises a register field specifying a register number and an extension field specifying an extension value to be appended to the register number. 9. The computer program product of claim 1 , wherein the placing of the result further comprises placing zeros in a third designated location of the register. 10. The computer program product of claim 9 , wherein the third designated location includes one or more leftmost positions of the register. 11. The computer program product of claim 1 , wherein the input value and the sign control are provided by one or more immediate fields of the instruction. 12. A computer system for facilitating processing within a computing environment, the computer system comprising: a memory; and a processor in communication with the memory, wherein the computer system is configured to perform the following comprising: obtaining an instruction for execution, the instruction to generate a value without obtaining the value from memory, the value for use in processing within the computing environment, the instruction having associated therewith a sign control to be used to provide a sign of the value to be generated by the instruction; executing the instruction, the executing comprising: obtaining the sign control; shifting an input value, provided by the instruction absent loading from memory, in a specified direction by a selected amount to provide a result; placing the result in a first designated location in a register; and including the sign, based on the sign control, in a second designated location of the register, the result and the sign providing a signed value to be used in processing within the computing environment, the signed value being generated absent loading from memory, wherein use of memory bandwidth of the computing environment is reduced. 13. The computer system of claim 12 , wherein the obtaining the sign control comprises obtaining the sign control from a field of the instruction, wherein based on the sign control being a first value, the sign is positive, and based on the sign control being a second value, the sign is negative; and wherein the register is specified using at least one field of the instruction. 14. The computer system of claim 12 , wherein the executing further comprises: obtaining the input value from an immediate field of the instruction; checking validity of the input value; and performing the shifting, based on the checking indicating the input value is valid. 15. The computer system of claim 12 , wherein the first designated location is a location of a magnitude of a signed packed decimal format in the register. 16. The computer system of claim 12 , wherein the placing of the result further comprises placing zeros in a third designated location of the register. 17. The computer system of claim 16 , wherein the third designated location includes one or more leftmost positions of the register. 18. The computer system of claim 12 , wherein the specified direction is left. 19. The computer system of claim 12 , wherein the executing further comprises obtaining the selected amount from an immediate field of the instruction. 20. The computer system of claim 12 , wherein the input value and the sign control are provided by one or more immediate fields of the instruction.

Assignees

Inventors

Classifications

  • Compare instructions, e.g. Greater-Than, Equal-To, MINMAX · CPC title

  • of immediate specifier, e.g. constants · CPC title

  • Arrangements for executing specific machine instructions · CPC title

  • Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion · CPC title

  • Register stacks; shift registers · CPC title

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What does patent US10235170B2 cover?
An instruction generates a value for use in processing within a computing environment. The instruction obtains a sign control associated with the instruction, and shifts an input value of the instruction in a specified direction by a selected amount to provide a result. The result is placed in a first designated location in a register, and the sign, which is based on the sign control, is placed…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/30032. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 19 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).