Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
US10229875B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10229875-B2 |
| Application number | US-201615072400-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 17, 2016 |
| Priority date | Mar 29, 2011 |
| Publication date | Mar 12, 2019 |
| Grant date | Mar 12, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A back end of the line (BEOL) fuse structure having a stack of vias. The stacking of vias leads to high aspect ratios making liner and seed coverage inside the vias poorer. The weakness of the liner and seed layers leads to a higher probability of electromigration (EM) failure. The fuse structure addresses failures due to poor liner and seed coverage. Design features permit determining where failures occur, determining the extent of the damaged region after fuse programming and preventing further propagation of the damaged dielectric region.
Opening claim text (preview).
What is claimed is: 1. A fuse structure, comprising: a first conductive line and a first conductive via disposed in a first dielectric layer, the first conductive line is above and in electrical contact with the first conductive via; a first liner disposed along at least vertical surfaces of the first conductive line and the first conductive via; a second conductive line and a second conductive via disposed in a second dielectric layer, the second conductive line is above and in electrical contact with the second conductive via, the second dielectric layer is above the first dielectric layer such that the second conductive via is in electrical contact with the first conductive line, and the second conductive line laterally extends around the second conductive via such that the second conductive line is wider in all directions than at least a diameter of an upper portion of the second conductive via; and a second liner disposed along at least vertical surfaces of the second conductive line and the second conductive via. 2. The fuse structure of claim 1 , wherein the first liner has a thickness of less than about 30 nm and the second liner has a thickness of greater than about 30 nm. 3. The fuse structure of claim 1 , wherein the first and second liners comprise a material selected from the group consisting of tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W), ruthenium (Ru), ruthenium nitride (RuN) and combinations thereof. 4. The fuse structure of claim 1 , wherein the first and second dielectric layers comprise a material selected from the group consisting of silicon oxide (SiO), silicon nitride (Si 3 N 4 ), hydrogenated silicon oxycarbide (SiCOH), silsesquioxanes, carbon-doped oxides, low dielectric constant materials and combinations thereof. 5. The fuse structure of claim 1 , wherein the first dielectric layer is disposed directly on a dielectric material having a conductor embedded therein, the conductor being in electrical contact with the first conductive via and the first conductive line. 6. The fuse structure of claim 1 , wherein the first conductive via, the second conductive via, the first conductive line, and the second conductive line each comprise a material selected from the group consisting of copper (Cu), aluminum (Al), silver (Ag), gold (Au) and alloys thereof. 7. The fuse structure of claim 1 , wherein the first conductive via has a high aspect ratio such that the first liner has poor coverage along the vertical surfaces of the first conductive via. 8. A fuse structure, comprising: a first conductive line disposed in a first trench in a first dielectric layer; a first conductive via disposed in a first cavity in the first dielectric layer, the first conductive line is above the first conductive via such that an upper surface of the first conductive via directly contacts a lower surface of the first conductive line; a first liner disposed along at least vertical surfaces of the first conductive line and the first conductive via; a second conductive line disposed in a second trench in a second dielectric layer; a second conductive via disposed in a first cavity in the second dielectric layer, the second conductive line is above the second conductive via such that an upper surface of the second conductive via directly contacts a lower surface of the second conductive line, the second dielectric layer is above the first dielectric layer such that a lower surface of the second conductive via directly contacts an upper surface of the first conductive line, and the second conductive line laterally extends around the second conductive via such that the second conductive line is wider in all directions than at least a diameter of an upper portion of the second conductive via; and a second liner disposed along at least vertical surfaces of the second conductive line and the second conductive via. 9. The fuse structure of claim 8 , wherein at least a portion of the first liner has a thickness less than the second liner. 10. The fuse structure of claim 8 , wherein the first liner has a thickness of less than about 30 nm and the second liner has a thickness of greater than about 30 nm. 11. The fuse structure of claim 8 , wherein the first and second liners comprise a material selected from the group consisting of tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W), ruthenium (Ru), ruthenium nitride (RuN) and combinations thereof, and wherein the first and second dielectric layers comprise a material selected from the group consisting of silicon oxide (SiO), silicon nitride (Si 3 N 4 ), hydrogenated silicon oxycarbide (SiCOH), silsesquioxanes, carbon-doped oxides, low dielectric constant materials and combinations thereof. 12. The fuse structure of claim 8 , wherein the first dielectric layer is disposed directly on a dielectric material having a conductor embedded therein, the conductor being in electrical contact with the second conductive line by way of the first conductive via, the first conductive line, and the second conductive via. 13. The fuse structure of claim 8 , wherein the first conductive via, the second conductive via, the first conductive line, and the second conductive line each comprise a material selected from the group consisting of copper (Cu), aluminum (Al), silver (Ag), gold (Au) and alloys thereof. 14. The fuse structure of claim 8 , wherein the first conductive via has a high aspect ratio such that the first liner has poor coverage along the vertical surfaces of the first conductive via. 15. A fuse structure, comprising: a first conductive line and a first conductive via in a first dielectric layer, the first conductive via extends vertically from a bottom surface of the first conductive line, and a height of the first conductive via plus a thickness of the first conductive line is equal to a thickness of the first dielectric layer; a first liner disposed along at least vertical surfaces of the first conductive line and the first conductive via; and a second conductive line and a second conductive via disposed in a second dielectric layer, the second conductive via extends vertically from a bottom surface of the second conductive line, and a height of the second conductive via plus a thickness of the second conductive line is equal to a thickness of the second dielectric layer, the second dielectric layer is above the first dielectric layer such that the a bottom surface of second conductive via directly contacts an upper surface of the first conductive line, and the second conductive line laterally extends around the second conductive via such that the second conductive line is wider in all directions than at least a diameter of an upper portion of the second conductive via. 16. The fuse structure of claim 15 , further comprising: a second liner disposed along at least vertical surfaces of the second conductive line and the second conductive via, wherein the first liner has a thickness of less than about 30 nm and the second liner has a thickness of greater than about 30 nm. 17. The fuse structure of claim 15 , wherein the first and second liners comprise a material selected from the group consisting of tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W), ruthenium (Ru), ruthenium nitride (RuN) and combinations thereof, and wherein the first conductive via, the second conductive via, the first conductive line, and the second conductive line each comprise a material selected from the group consisting of copper (Cu), aluminum (Al)
Arrangements for protection of devices (arrangements for thermal protection H10W40/00) · CPC title
Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title
Barrier, adhesion or liner layers · CPC title
comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title
Vias, e.g. via plugs · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.