Passive-matrix light-emitting diodes on silicon micro-display

Patent metadata

Field	Value
Publication number	US-10229630-B2
Application number	US-201514710843-A
Country	US
Kind code	B2
Filing date	May 13, 2015
Priority date	May 14, 2014
Publication date	Mar 12, 2019
Grant date	Mar 12, 2019

Abstract

A passive-matrix light-emitting diodes on silicon (LEDoS) micro-display is presented herein. The LEDoS micro-display comprises a passive-matrix micro-light-emitting diode (LED) array comprising passive-matrix micro-light-emitting diodes (LEDs), and a display driver configured to apply column signals to columns of LED pixels of the passive-matrix micro-LED array and scan signals to rows of the LED pixels, wherein the passive-matrix micro-LED array is flip-chip bonded to the display driver based on solder bumps located at peripheral areas of the passive-matrix micro-LED array.

First claim

What is claimed is:

1. A display, comprising:
a passive-matrix inorganic micro-light-emitting diode (LED) array comprising passive-matrix addressable inorganic micro-LED pixels; and
a display driver configured to apply column signals to columns of the passive-matrix inorganic micro-LED array and scan signals to rows of the passive-matrix inorganic micro-LED array, wherein anodes of a first group of inorganic LEDs of the passive-matrix inorganic micro-LED array are connected to a row of the rows, wherein the row comprises a p-electrode stripe that is connected to contact holes associated with respective p-type ohmic contacts that connect pixels of the passive-matrix addressable inorganic micro-LED pixels to the display driver via solder bumps corresponding to respective plates located at peripheral areas of the passive-matrix inorganic micro-LED array, wherein cathodes of a second group of inorganic LEDs of the passive-matrix inorganic micro-LED array are connected to a column of the columns, and wherein the inorganic LEDs comprise respective doped layers of gallium nitride that have been formed on a sapphire-based substrate.

2. The display of claim 1 , wherein a first number of the solder bumps is less than a second number of the passive-matrix addressable inorganic micro-LED pixels.

3. The display of claim 1 , wherein the solder bumps comprise at least one of indium, gold, copper, lead, tin, or alloy.

4. The display of claim 1 , wherein the solder bumps are replaced by anisotropic conductive film (ACF) or anisotropic conductive paste (ACP).

5. The display of claim 1 , wherein the passive-matrix addressable inorganic micro-LED pixels comprise green passive-matrix inorganic LEDs corresponding to a peak wavelength from 500 nanometers to 550 nanometers, blue passive-matrix inorganic LEDs corresponding to a peak wavelength from 440 nanometers to 480 nanometers, and red passive-matrix inorganic LEDs corresponding to a peak wavelength from 620 nanometers to 680 nanometers.

6. The display of claim 1 , wherein the passive-matrix inorganic micro-LED array provides a grayscale represented by 6 bits of data corresponding to the column signals and the scan signals.

7. The display of claim 1 , wherein the column comprises a common n-electrode.

8. The display of claim 7 , wherein the display driver is further configured to apply a column signal of the column signals to the common n-electrode.

9. The display of claim 1 , wherein the row comprises a common p-electrode.

10. The display of claim 9 , wherein the display driver is further configured to apply the scan signals to consecutive rows of the rows in a sequential manner via p-electrode stripes comprising the p-electrode stripe.

11. The display of claim 1 , wherein the display driver comprises:
a memory;
a processing component configured to receive data and store the data in the memory; and
a driver component configured to:
read the data from the memory and generate, based on the data, the column signals; and
apply the column signals to the columns.

12. The display of claim 11 , wherein the driver component is further configured to apply a scan signal of the scan signals to the row via the p-electrode stripe.

13. A system, comprising:
a clock component configured to generate a control clock;
a processor component configured to generate pixel data; and
a display, comprising:
an array of passive-matrix inorganic micro-light-emitting diodes (LEDs) comprising a layer of gallium nitride that has been formed on a sapphire substrate; and
a display driver that is configured to apply, based on the control clock and the pixel data, first control signals to columns of pixels of the array of passive-matrix inorganic micro-LEDs and second control signals to rows of the pixels, wherein a row of the rows is connected to anodes of first diodes of the array of passive-matrix inorganic micro-LEDs, wherein the row comprises a p-electrode stripe that is connected to contact holes associated with respective p-type ohmic contacts that connect the pixels of the array of passive-matrix inorganic micro-LEDs to the display driver via solder bumps corresponding to respective plates located at peripheral areas of the array of passive-matrix inorganic micro-LEDs, and wherein a column of the columns is connected to cathodes of second diodes of the array of passive-matrix inorganic micro-LEDs.

14. The system of claim 13 , wherein the column comprises an n-electrode.

15. The system of claim 13 , wherein the display driver is further configured to apply the second control signals to consecutive rows of the rows of the pixels in a sequential manner.

16. A method, comprising:
applying, by a system comprising a processor, first signals to columns of pixels of an array of passive-matrix inorganic micro-light-emitting diodes (LEDs) comprising gallium nitride and sapphire, wherein a column of the columns is connected to cathodes of a first group of inorganic LEDs of the array of passive-matrix inorganic micro-LEDs; and
applying, by the system via solder bumps corresponding to respective plates located a peripheral areas of the array of passive-matrix inorganic micro-LEDs, second signals to rows of the pixels, wherein a row of the rows is connected to anodes of a second group of inorganic LEDs of the array of passive-matrix inorganic micro-LEDs, and wherein the row comprises a p-electrode stripe that is connected to contact holes associated with respective p-type ohmic contacts that connect the pixels to respective solder bumps of the solder bumps.

17. The method of claim 16 , wherein the column comprises an n-electrode, and wherein the applying the first signals comprises applying a signal of the first signals to the n-electrode.

18. The method of claim 16 , wherein the applying the second signals comprises applying a signal of the second signals to the p-electrode stripe.

19. The method of claim 16 , wherein the applying the first signals comprises applying the first signals to the columns at respective times utilizing pulse width modulation.

20. The method of claim 16 , wherein the applying the first signals comprises applying the first signals to the columns at respective times utilizing pulse-frequency modulation.

21. The method of claim 16 , wherein the applying the second signals comprises applying the second signals to consecutive rows of the rows in a sequential manner.

Assignees

• Univ Hong Kong Sci & Tech

Inventors

• Lau Kei May
• Liu Zhaojun
• Chong Wing Cheung
• Cho Wai Keung
• Wang chu hong

Classifications

• H10W90/00

  Package configurations · CPC title

• H01L25/16

  Electricity · mapped topic

• H01L33/0095

  Electricity · mapped topic

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• H01L27/156

  Electricity · mapped topic