Resuming a system-on-a-chip device

Patent metadata

Field	Value
Publication number	US-10228745-B2
Application number	US-201515519857-A
Country	US
Kind code	B2
Filing date	Jan 29, 2015
Priority date	Jan 29, 2015
Publication date	Mar 12, 2019
Grant date	Mar 12, 2019

Abstract

As part of starting a system including a system-on-a-chip (SoC) device from a mode in which power is removed from the system, the SoC device determines, based on the metadata, whether to resume the system to a prior system state. In response to the metadata indicating that the system is to be resumed to the prior system state, the system is resumed to the prior system state using system state information stored in the on-chip non-volatile memory.

First claim

What is claimed is:

1. A method comprising:
writing, to an on-chip non-volatile memory of a system-on-a-chip (SoC) device, instructions and metadata when a system comprising the SoC device is powered;
as part of starting the system from a mode in which power is removed from the system, determining, by the SoC device based on the metadata, whether to resume the system to a prior system state; and
in response to the metadata indicating that the system is to be resumed to the prior system state, resuming the system to the prior system state using system state information stored in the on-chip non-volatile memory.

2. The method of claim 1 , wherein the on-chip non-volatile memory includes a plurality of logical regions comprising a persistent region and at least one of a read-only memory region or a transient region, the method further comprising:
accessing the metadata to locate the plurality of logical regions.

3. The method of claim 2 , wherein the plurality of logical regions further comprise a secure region, the method further comprising:
performing a secure operation by the SoC device using information in the secure region.

4. The method of claim 2 , further comprising, as part of the starting:
executing, by the SoC device, a first bootloader from the read-only memory region; and
executing, by the SoC device, a second bootloader from the persistent region of the on-chip non-volatile memory, the second bootloader invoked by the first bootloader.

5. The method of claim 4 , further comprising:
executing, by the SoC device, boot code and an operating system from the persistent region of the on-chip non-volatile memory.

6. The method of claim 1 , further comprising:
in response to the metadata indicating that the system is to resume from a clean boot state, a last known good state, or a state corresponding to a restore point, resuming the system to the clean boot state, the last known good state, or the state corresponding to a restore point, without removing power from the system.

7. The method of claim 1 , further comprising:
restoring, by the SoC device, volatile data from a snapshot in the on-chip non-volatile memory, the snapshot including the system state information.

8. The method of claim 7 , further comprising:
creating the snapshot by:
suspending execution of machine-executable instructions;
flushing content of volatile storage on the SoC device to the on-chip non-volatile memory; and
storing information relating to hardware devices and machine-executable instructions in the on-chip non-volatile memory.

9. The method of claim 1 , wherein the SoC device includes a user-activatable hardware control element, the method further comprising resetting the SoC device in response to activation of the hardware control element.

10. The method of claim 1 , wherein the prior system state comprises information of machine-readable instructions executing in the SoC device when the SoC device is powered.

11. A system-on-a-chip (SoC) device, comprising:
a processor; and
a non-volatile memory to store metadata comprising an indicator to indicate whether a system comprising the SoC device is to be resumed or booted, and information pertaining to a plurality of regions of the non-volatile memory, the plurality of regions comprising a transient region and a persistent region, wherein the SoC device is to write the metadata to the non-volatile memory when the SoC device is powered,
as part of starting the system from a mode in which power is removed from the SoC device, the processor to:
determine, based on the indicator, whether to resume the system from a prior system state;
in response to the indicator specifying that the system is to be resumed from the prior system state, resume the system to the prior system state using system state information stored in the on-chip non-volatile memory; and
identifying the transient region and the persistent region of the non-volatile memory using the information pertaining to the plurality of regions.

12. The SoC device of claim 11 , wherein the non-volatile memory further comprises a read-only memory (ROM) region to store boot code executable by the processor in response to the starting of the system.

13. The SoC device of claim 11 , wherein the processor is to discard data in the transient region in response to a boot of the system.

14. The SoC device of claim 11 , wherein the processor is to notify an operating system or a bare-metal code that content of a volatile main memory is to be restored from a snapshot in the non-volatile memory or another storage.

15. The SoC device of claim 11 , wherein the plurality of regions further comprise a read-only memory region, wherein the processor is to, as part of the starting:
execute a first bootloader from the read-only memory region; and
execute a second bootloader from the persistent region, the second bootloader invoked by the first bootloader.

16. The SoC device of claim 11 , wherein the processor is to:
create the system state information by:
suspending execution of machine-executable instructions;
flushing content of volatile storage on the SoC device to the non-volatile memory; and
storing information relating to hardware devices and machine-executable instructions in the non-volatile memory.

17. The SoC device of claim 11 , wherein the prior system state comprises a state of machine-readable instructions executing in the SoC device when the SoC device is powered.

18. A system comprising:
peripheral devices; and
a system-on-a-chip (SoC) device comprising:
a processor; and
a non-volatile memory to store metadata comprising an indicator to indicate whether the system is to be resumed or booted, and information pertaining to a plurality of regions of the non-volatile memory, the plurality of regions including a transient region, wherein the SoC device is to write the metadata to the non-volatile memory when the system is powered,
as part of starting the system from a mode in which power is removed from the system, the processor to:
determine, based on the indicator, whether to resume the system from a prior system state;
in response to the indicator specifying that the system is to be resumed from the prior system state, resume the system to the prior system state using system state information stored in the on-chip non-volatile memory; and
initialize the peripheral devices using the system state information.

19. The system of claim 18 , further comprising a volatile main memory, the processor to further notify an operating system or bare-metal code to recover content of the volatile main memory from a snapshot stored in the non-volatile memory or another storage.

20. The system of claim 18 , wherein the prior system state comprises a state of machine-readable instructions executing in the SoC device when the SoC device is powered.

Assignees

• Hewlett Packard Development Co

Inventors

• Costa Carlos Haas
• Perez Taciano Dreckmann
• Perone Christian Samuel
• Silva Thiago
• Walrath Craig A

Classifications

• G06F9/4403 Primary

  Processor initialisation · CPC title

• G06F1/3243

  Power saving in microcontroller unit · CPC title

• G06F13/42

  Bus transfer protocol, e.g. handshake; Synchronisation · CPC title

• G06F11/1438

  Restarting or rejuvenating · CPC title

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title