DC-DC power converters and methods of operating DC-DC power converters

Patent metadata

Field	Value
Publication number	US-10224828-B1
Application number	US-201815989025-A
Country	US
Kind code	B1
Filing date	May 24, 2018
Priority date	May 24, 2018
Publication date	Mar 5, 2019
Grant date	Mar 5, 2019

Abstract

A DC-DC power converter includes an input, an output, a transformer, a primary field-effect transistor (FET), and a synchronous rectifier. The synchronous rectifier includes a drain that experiences multiple resonant voltage valleys during each dead-time period of the converter. The converter further includes a synchronous rectifier drive circuit configured to turn on and turn off the synchronous rectifier, and a primary control circuit. The primary control circuit is configured to operate the primary FET in a valley skipping mode, and to transmit a drive signal to the synchronous rectifier drive circuit to turn on the synchronous rectifier during a specified one of the multiple resonant voltage valleys to generate a negative current through the synchronous rectifier. Methods of operating a DC-DC power converter are also disclosed.

First claim

The invention claimed is:

1. A DC-DC power converter, comprising:
an input for receiving a DC input voltage from a voltage source;
an output for supplying a DC output voltage to a load;
a transformer coupled between the input and the output, the transformer having a primary winding and a secondary winding;
a primary field-effect transistor (FET) coupled to selectively conduct current through the primary winding of the transformer;
a synchronous rectifier coupled to selectively conduct current through the secondary winding of the transformer, the synchronous rectifier including a drain that experiences multiple resonant voltage valleys during each dead-time period of the converter;
a synchronous rectifier drive circuit configured to turn on and turn off the synchronous rectifier; and
a primary control circuit configured to operate the primary FET in a valley skipping mode, and to transmit a drive signal to the synchronous rectifier drive circuit to turn on the synchronous rectifier during a specified one of the multiple resonant voltage valleys to generate a negative current through the synchronous rectifier.

2. The converter of claim 1 , further comprising an isolator coupled between the primary control circuit and the synchronous rectifier drive circuit, the primary control circuit configured to transmit the drive signal through the isolator to the synchronous rectifier drive circuit.

3. The converter of claim 2 , further comprising:
a logical OR-gate having a first input and a second input; and
an integrated circuit having an input coupled to detect a current of the secondary winding of the transformer and an output coupled to transmit a control signal to turn on and turn off the synchronous rectifier according to the detected current, wherein:
the control signal output by the integrated circuit is supplied to the first input of the logical OR-gate; and
the drive signal transmitted by the primary control circuit is supplied to the second input of the logical OR-gate.

4. The converter of claim 1 , wherein the primary control circuit includes a peak detect delay circuit configured to detect a peak voltage on at least one of the primary winding of the transformer, a drain of the primary FET and an auxiliary winding of the transformer, and to transmit the drive signal to the synchronous rectifier drive circuit in response to detecting the peak voltage in order to turn on the synchronous rectifier during the specified one of the multiple resonant voltage valleys.

5. The converter of claim 1 , wherein the primary control circuit includes a valley skipping circuit configured to inhibit transmission of the drive signal to the synchronous rectifier drive circuit until the specified one of the multiple resonant voltage valleys occurs.

6. The converter of claim 1 , wherein the primary control circuit includes a ZVS delay circuit configured to wait for a specified ZVS delay duration after the synchronous rectifier is turned off before turning on the primary FET, to facilitate zero-voltage switching of the primary FET.

7. The converter of claim 1 , wherein the primary control circuit includes a reverse current delay circuit configured to transmit the drive signal to the synchronous rectifier drive circuit for a specified reverse current duration.

8. The converter of claim 7 , wherein the specified reverse current duration is sufficient to build up the negative current in the synchronous rectifier to a specified value before the synchronous rectifier is turned off.

9. The converter of claim 8 , wherein the specified reverse current duration is sufficient to allow the negative current to energize a magnetizing inductance of the transformer to discharge an equivalent capacitance of the primary FET before the primary FET is turned on.

10. The converter of claim 1 , wherein:
the primary control circuit includes a first delay circuit block, a second delay circuit block, and a third delay circuit block;
the first delay circuit block is coupled to receive a zero-current detection (ZCD) signal of the voltage on at least one of the primary winding of the transformer, a drain of the primary FET and an auxiliary winding, and wait a specified peak delay period before outputting a peak delay signal;
the second delay circuit block is configured to wait a specified reverse current duration and a specified ZVS delay duration after receiving the peak delay signal from the first delay circuit before turning on the primary FET; and
the third delay circuit block is configured to transmit the drive signal to the synchronous rectifier drive circuit for the specified reverse current duration, after receiving the peak delay signal from the first delay circuit.

11. The converter of claim 1 , wherein
the control circuit is configured to operate the converter in a quasi-resonant mode including frequency foldback.

12. A method of operating a DC-DC power converter, the converter including an input, an output, a transformer coupled between the input and the output, the transformer having a primary winding and a secondary winding, a primary field-effect transistor (FET) coupled to selectively conduct current through the primary winding, a synchronous rectifier coupled to selectively conduct current through the secondary winding, the synchronous rectifier including a drain that experiences multiple resonant voltage valleys during each dead-time period of the converter, a primary control circuit and a synchronous rectifier drive circuit, the method comprising:
operating, by the primary control circuit, the primary FET in a valley skipping mode; and
transmitting, by the primary control circuit, a drive signal to the synchronous rectifier drive circuit to turn on the synchronous rectifier during a specified one of the multiple resonant voltage valleys to generate a negative current through the synchronous rectifier.

13. The method of claim 12 , wherein:
the converter includes an isolator coupled between the primary control circuit and the synchronous rectifier drive circuit; and
transmitting the drive signal includes transmitting the drive signal through the isolator to the synchronous rectifier drive circuit.

14. The method of claim 12 , further comprising:
detecting a peak voltage on a drain of the primary FET; and
transmitting the drive signal to the synchronous rectifier drive circuit for a specified reverse current duration after detecting the peak voltage on the drain of the primary FET to turn on the synchronous rectifier during the last one of the multiple resonant voltage valleys.

15. The method of claim 12 , further comprising inhibiting transmission of the drive signal to the synchronous rectifier drive circuit until the specified one of the multiple resonant voltage valleys occurs.

16. The method of claim 12 , further comprising waiting for a specified ZVS delay duration after the synchronous rectifier is turned off before turning on the primary FET, to facilitate zero-voltage switching of the primary FET.

17. The method of claim 12 , wherein transmitting the drive signal includes transmitting the drive signal to the synchronous rectifier drive circuit for a specified reverse current duration.

18. The method of claim 17 , wherein the specified reverse current duration is sufficient to allow the negative current to energize a magnetizing inductance of the transformer to discharge an equivalent capacitance of the primary FET before the primary FET is turned on.

19. The method of claim 18 , wherein operating the primary FET in a valley skipping mode in

Assignees

• Astec Int Ltd

Inventors

• Sigamani James
• Soleño Antonio Remetio
• Lazo Kenneth Rivera

Classifications

• H02M3/33592 Primary

  having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer · CPC title

• H02M3/33523

  with galvanic isolation between input and output of both the power stage and the feedback loop · CPC title

• H02M3/3353

  having at least two simultaneously operating switches on the input side, e.g. "double forward" or "double (switched) flyback" converter · CPC title

• H02M3/33507

  with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title