Bi-directional bi-polar device for ESD protection
US-11862735-B2 · Jan 2, 2024 · US
US10224319B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10224319-B2 |
| Application number | US-201715658688-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 25, 2017 |
| Priority date | Sep 26, 2016 |
| Publication date | Mar 5, 2019 |
| Grant date | Mar 5, 2019 |
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An electrostatic protection element whose electrostatic breakdown resistance can be adjusted with a required minimum design change is provided. A semiconductor device includes an electrostatic protection element including a bipolar transistor whose base region and emitter region are electrically coupled together through a resistance region. At this time, the base region of the electrostatic protection element has a side including a facing portion that faces the collector region. The facing portion of the side includes an exposed portion that is exposed from an emitter wiring in plan view and a covered portion that is covered by the emitter wiring in plan view.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: an electrostatic protection element including a bipolar transistor, wherein the electrostatic protection element includes: a base region formed in an epitaxial layer, an emitter region which is formed in the epitaxial layer and contained in the base region in plan view, a collector region which is formed in the epitaxial layer and separately arranged from the base region in plan view, and an emitter wiring which is electrically coupled with each of the base region and the emitter region and partially overlapped with the base region in plan view, wherein the base region and the emitter region are electrically coupled together through a resistance region, wherein the base region has a first side including a facing portion that faces the collector region, and wherein the facing portion of the first side includes: an exposed portion that is exposed from the emitter wiring in plan view, and a covered portion that is covered by the emitter wiring in plan view. 2. The semiconductor device according to claim 1 , wherein the exposed portion is exposed from a notch portion provided in the emitter wiring. 3. The semiconductor device according to claim 1 , wherein the covered portion functions as a field plate portion. 4. The semiconductor device according to claim 1 , wherein the first side forms a boundary line of a pn junction, and wherein a breakdown voltage of the exposed portion is lower than a breakdown voltage of the covered portion. 5. The semiconductor device according to claim 1 , wherein the base region includes: a first region including the exposed region, and a second region including the covered portion, wherein the first region functions as a leakage current generation region, and wherein the second region functions as the resistance region. 6. The semiconductor device according to claim 1 , wherein the first side includes: a first end portion that is covered by the emitter wiring in plan view, and a second end portion that is exposed from the emitter wiring in plan view, and wherein a plug that electrically couples the base region and the emitter region together is formed in an end portion region of the base region including the first end portion of the first side. 7. The semiconductor device according to claim 1 , wherein the collector region has a second side in parallel with the first side of the base region, and wherein a length of the first side of the base region is the same as a length of the second side of the collector region. 8. The semiconductor device according to claim 1 , wherein a conductor film is formed between the base region and the emitter wiring in a cross-sectional view, and wherein the covered portion is covered by the conductor film. 9. The semiconductor device according to claim 8 , wherein the conductor film is formed of a polysilicon film. 10. The semiconductor device according to claim 1 , wherein the base region is formed of a p-type semiconductor region, wherein each of the emitter region and the collector region is formed of an n-type semiconductor region, and wherein the epitaxial layer is formed of an n-type semiconductor layer. 11. The semiconductor device according to claim 1 , further comprising: an input terminal to which a signal is inputted; a power supply terminal to which a power supply potential is supplied; a ground terminal to which a reference potential is supplied; and wherein the electrostatic protection element is coupled between the input terminal and the ground terminal. 12. The semiconductor device according to claim 11 , wherein the bipolar transistor is an NPN bipolar transistor, wherein the collector region is electrically coupled with the input terminal, and wherein the emitter region is electrically coupled with the ground terminal.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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