Semiconductor memory device and operation method thereof

Patent metadata

Field	Value
Publication number	US-10224102-B2
Application number	US-201715835898-A
Country	US
Kind code	B2
Filing date	Dec 8, 2017
Priority date	May 16, 2017
Publication date	Mar 5, 2019
Grant date	Mar 5, 2019

Abstract

A semiconductor memory device may include a control logic. The control logic may be coupled to bit lines through a read and write (read/write) circuit and to word lines. The control logic is configured to determine a duration of an activation time of a strobe signal for the read/write circuit.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a memory cell array including a plurality of memory blocks;
a read and write (read/write) circuit configured to read data from the memory cell array; and
a control logic configured to control the read/write circuit to perform a read operation on the memory cell array,
wherein the control logic is configured to perform a read operation by applying different activation times indicating periods in which activation states of strobe signals are maintained, according to the position of a word line connected to a memory block.

2. The semiconductor memory device of claim 1 , wherein the control logic includes a lookup table that stores an activation time of a strobe signal, the activation time of the strobe signal is defined for each word line coupled to the memory block.

3. The semiconductor memory device of claim 2 , wherein, when a read command and an address are received by the semiconductor memory device, the control logic determines an activation time of a strobe signal with respect to a word line corresponding to the received address, with reference to the lookup table.

4. The semiconductor memory device of claim 3 , further comprising a temperature measuring unit configured to measure a temperature of the semiconductor memory device, and transmit the measured result to the control logic.

5. The semiconductor memory device of claim 4 , wherein the lookup table stores an activation times of strobe signals, each of the activation times for the strobe signals are defined for each of a plurality of temperature sections.

6. The semiconductor memory device of claim 2 , wherein the word lines coupled to the memory block are grouped into a plurality of groups, and
the lookup table stores activation times of strobe signals, which are defined for each of the plurality of groups.

7. The semiconductor memory device of claim 6 , wherein numbers of word lines belonging to two or more of the respective groups are the same.

8. The semiconductor memory device of claim 6 , wherein the numbers of word lines belonging to two or more of the respective groups are different.

9. A method of operating a semiconductor memory device, the method comprising:
grouping a plurality of word lines coupled to a memory block of the semiconductor memory device into a plurality of word line groups;
determining activation times of strobe signals according to temperatures, with respect to each of the word line groups, the activation times indicating periods in which activation states of the strobe signals are maintained; and
storing the determined activation times of the strobe signals in a lookup table of the semiconductor memory device.

10. The method of claim 9 , wherein at least two or more of the word line groups determined in the grouping of the plurality of word lines coupled to the memory block of the semiconductor memory device into the plurality of word line groups include the same number of word lines.

11. The method of claim 9 , wherein at least two or more of the word line groups determined in the grouping of the plurality of word lines coupled to the memory block of the semiconductor memory device into the plurality of word line groups include different numbers of word lines.

12. The method of claim 9 , wherein, in the determining of the activation times of the strobe signals according to the temperatures, with respect to each of the word line groups, as a word line group becomes closer to a drain select line coupled to the memory block, a relatively longer activation time of a strobe signal is determined with respect to the word line group.

13. The method of claim 9 , wherein, in the determining of the activation times of the strobe signals according to the temperatures, with respect to each of the word line groups, as a word line group becomes closer to a source select line coupled to the memory block, a relatively longer activation time of a strobe signal is determined with respect to the word line group.

14. The method of claim 9 , wherein, in the determining of the activation times of the strobe signals according to the temperatures, with respect to each of the word line groups, as the temperature of the semiconductor memory device becomes greater, a relatively shorter activation time of a strobe signal is determined.

15. A method of operating a semiconductor memory device, the method comprising:
receiving a read command and an address;
receiving a temperature measurement result of the semiconductor memory device;
determining an activation time of indicating a period in which an activation state of a strobe signal is maintained, based on the temperature measurement result and the position of a word line corresponding to the address, with reference to a lookup table; and
performing a read operation, based on the determined activation time of the strobe signal.

16. The method of claim 15 , wherein the lookup table stores activation times of strobe signals with respect to a plurality of word line groups.

17. The method of claim 16 , wherein at least two word line groups from the plurality of word line groups include the same number of word lines.

18. The method of claim 16 , wherein at least two word line groups from the plurality of word line groups include different numbers of word lines.

19. The method of claim 15 , wherein the lookup table stores activation times of strobe signals, each of the activation times for the strobe signals are defined for each of a plurality of temperature sections.

20. The method of claim 19 , wherein the lookup table stores a relatively short activation time of a strobe signal with respect to a temperature section of relatively high temperatures.

21. A semiconductor memory device comprising:
a plurality of memory cells coupled between word lines and bit lines;
a plurality of page buffers coupled to the bit lines, respectively, each of the page buffers configured to receive a strobe signal to read data from a memory cell in a read operation; and
a control logic configured to determine a duration in which the strobe signal maintains an activation state, based on a position of a word line coupled to a memory cell to read data from and a temperature measurement result.

22. The semiconductor memory device according to claim 21 , wherein activation times of the strobe signals used for reading memory cells have the same duration if word lines coupled to the memory cells are within a same group.

23. The semiconductor memory device according to claim 22 , wherein the control logic includes a lookup table to provide the same duration of activation times of the strobe signals for reading memory cells coupled to word lines that are in the same group.

24. The semiconductor memory device according to claim 21 , wherein the temperature measurement result is within a temperature range including two or more temperatures associated with the duration of the activation time of the strobe signal.

25. The semiconductor memory device according to claim 24 , wherein the control logic includes a lookup table to associate the temperature range with the duration of the activation time of the strobe signal.

26. A semiconductor memory device comprising:
a control logic coupled to bit lines through a read and write (read/write) circuit and to word lines through an address decoder,
wherein the control logic is configured to determine a duration

Assignees

• Sk Hynix Inc

Inventors

• Choi Gil Bok
• Cho Sung Hoon
• Kim Sung Ho
• Park Min Sang
• Lee Kyong Taek
• Cho Myoung Kwan

Classifications

• G11C2216/14

  Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory · CPC title

• G11C16/10

  Programming or data input circuits · CPC title

• G11C16/04 Primary

  using variable threshold transistors, e.g. FAMOS · CPC title

• G11C7/04 Primary

  with means for avoiding disturbances due to temperature effects · CPC title

• G11C16/3418

  Disturbance prevention or evaluation; Refreshing of disturbed memory data · CPC title