Analog arithmetic circuit, semiconductor device, and electronic device

Patent metadata

Field	Value
Publication number	US-10222848-B2
Application number	US-201515124543-A
Country	US
Kind code	B2
Filing date	Mar 2, 2015
Priority date	Mar 14, 2014
Publication date	Mar 5, 2019
Grant date	Mar 5, 2019

Abstract

The power consumption of an analog arithmetic circuit is reduced. The analog arithmetic circuit includes a plurality of first circuits. An output terminal of the k-th (k is a natural number) first circuit is connected to an input terminal of the k+1-th first circuit. Each of the first circuits includes a memory circuit which holds an analog signal, a second circuit which performs arithmetic processing using the analog signal, a switch which controls power supply to the second circuit, and a controller. The conduction state of the switch included in the k-th first circuit is controlled by the controller included in the k+1-th first circuit. The arithmetic processing performed by the second circuit included in the k+1-th first circuit is started by the controller included in the k+1-th first circuit.

First claim

The invention claimed is:

1. An analog arithmetic circuit comprising a plurality of first circuits,
wherein an output terminal of the k-th (k is a natural number) first circuit is connected to an input terminal of the k+1-th first circuit,
wherein each of the first circuits comprises a memory circuit which holds an analog signal, a second circuit which performs arithmetic processing using the analog signal, a switch which controls power supply to the second circuit, and a controller,
wherein the memory circuit is electrically connected to the controller,
wherein an output terminal of the second circuit in the k-th first circuit is electrically connected to an input terminal of the memory circuit in the k+1-th first circuit,
wherein a first output terminal of the controller in the k+1-th first circuit is electrically connected to an input terminal of the controller in the k+2-th first circuit, and
wherein a second output terminal of the controller in the k+1-th first circuit is electrically connected to the switch in the k-th first circuit.

2. The analog arithmetic circuit according to claim 1 ,
wherein the switch comprises a transistor, and
wherein the transistor comprises a channel formation region in an oxide semiconductor film.

3. The analog arithmetic circuit according to claim 2 , wherein the oxide semiconductor film contains In, Ga, and Zn.

4. An electronic device comprising:
the analog arithmetic circuit according to claim 1 ; and
a display device.

5. A semiconductor device comprising:
the analog arithmetic circuit according to claim 1 ; and
a logic circuit.

6. An electronic device comprising:
the semiconductor device according to claim 5 ; and
a display device.

Assignees

• Semiconductor Energy Lab

Inventors

• Kurokawa Yoshiyuki
• Ikeda Takayuki
• Yamazaki Shunpei

Classifications

• G06G7/00

  Devices in which the computing operation is performed by varying electric or magnetic quantities · CPC title

• G06F1/32 Primary

  Means for saving power · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• G06G7/12 Primary

  Arrangements for performing computing operations, e.g. {operational} amplifiers specially adapted therefor · CPC title

• G06F1/3243 Primary

  Power saving in microcontroller unit · CPC title