Source follower based envelope tracking for power amplifier biasing

Patent metadata

Field	Value
Publication number	US-10218326-B2
Application number	US-201715583890-A
Country	US
Kind code	B2
Filing date	May 1, 2017
Priority date	Oct 28, 2016
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

First claim

What is claimed is:

1. A power amplifier bias circuit with embedded envelope detection comprising:
an envelope detector circuit configured to generate a baseband envelope tracking bias signal to bias a power amplifier, the envelope detector circuit including:
a first source/emitter follower transistor,
a first current driver coupled to an output node of the first source/emitter follower transistor, and
a filter coupled to the output node of the first source/emitter follower transistor; and

a power amplifier bias circuit stage coupled to the envelope detector circuit, the power amplifier bias circuit stage including:
at least one replica transistor of the power amplifier,
an envelope detector replica transistor, and
a replica of the first current driver of the envelope detector circuit.

2. The power amplifier bias circuit of claim 1 , further comprising a bias signal generated by the power amplifier bias circuit stage and provided at a gate/base of the first source/emitter follower transistor and a gate/base of the envelope detector replica transistor.

3. The power amplifier bias circuit of claim 2 , further comprising a radio frequency signal sensed and provided to the gate/base of the first source/emitter follower transistor, the radio frequency signal that is sensed being the same as the radio frequency signal that is received by the power amplifier.

4. The power amplifier bias circuit of claim 3 , in which the filter of the envelope detector circuit is configured to reject the radio frequency signal at the output node of the first source/emitter follower transistor.

5. The power amplifier bias circuit of claim 3 , in which the baseband envelope tracking bias signal is obtained at the output node of the first source/emitter follower transistor, the baseband envelope tracking bias signal to be provided to the power amplifier when the radio frequency signal is sensed at the envelope detector circuit.

6. The power amplifier bias circuit of claim 3 , in which the power amplifier comprises a differential power amplifier, and in which a transformer is coupled between the power amplifier bias circuit stage and the power amplifier via a differential signal path.

7. The power amplifier bias circuit of claim 6 , in which the baseband envelope tracking bias signal is provided to a center tap of the transformer.

8. The power amplifier bias circuit of claim 3 , further comprising an adjustable gain device coupled to the envelope detector circuit, in which the radio frequency signal is provided to the envelope detector circuit via the adjustable gain device.

9. The power amplifier bias circuit of claim 3 , further comprising a resistor coupled between the envelope detector circuit and the power amplifier bias circuit stage, in which the gate/base of the first source/emitter follower transistor is biased through the resistor.

10. The power amplifier bias circuit of claim 1 , in which the power amplifier comprises a push-pull differential source/emitter follower driven power amplifier, and in which the at least one replica transistor of the power amplifier comprises a plurality of replica transistors that replicate transistors of the push-pull differential source/emitter follower driven power amplifier.

11. The power amplifier bias circuit of claim 1 , further comprising a second current driver coupled to the at least one replica transistor of the power amplifier, the first current driver and the second current driver being independently adjustable to respectively adjust current through the envelope detector circuit and current through the at least one transistor of the power amplifier.

12. A power amplifier bias circuit with embedded envelope detection comprising:
an envelope detector circuit configured to generate a baseband envelope tracking bias signal to bias a power amplifier, the envelope detector circuit including:
a first source/emitter follower transistor,
means for generating current to an output node of the first source/emitter follower transistor, and
means for filtering radio frequency signals at the output node of the first source/emitter follower transistor; and

a power amplifier bias circuit stage coupled to the envelope detector circuit, the power amplifier bias circuit stage including:
at least one replica transistor of the power amplifier,
an envelope detector replica transistor, and
a replica of the current generating means of the envelope detector circuit.

13. The power amplifier bias circuit of claim 12 , further comprising a bias signal generated by the power amplifier bias circuit stage and provided at a gate/base of the first source/emitter follower transistor and a gate/base of the envelope detector replica transistor.

14. The power amplifier bias circuit of claim 13 , further comprising a radio frequency signal sensed and provided to the gate/base of the first source/emitter follower transistor, the radio frequency signal that is sensed being the same as the radio frequency signal that is received by the power amplifier.

15. The power amplifier bias circuit of claim 14 , in which the filtering means rejects the radio frequency signal at the output node of the first source/emitter follower transistor.

16. The power amplifier bias circuit of claim 14 , in which the baseband envelope tracking bias signal is obtained at the output node of the first source/emitter follower transistor, the baseband envelope tracking bias signal to be provided to the power amplifier when the radio frequency signal is sensed at the envelope detector circuit.

17. The power amplifier bias circuit of claim 14 , in which the power amplifier comprises a differential power amplifier, and in which a transformer is coupled between the power amplifier bias circuit stage and the power amplifier via a differential signal path.

18. The power amplifier bias circuit of claim 17 , in which the baseband envelope tracking bias signal is provided to a center tap of the transformer.

19. The power amplifier bias circuit of claim 12 , further comprising a current driver coupled to the at least one replica transistor of the power amplifier, the current generating means and the current driver being independently adjustable to respectively adjust current through the envelope detector circuit and current through the at least one transistor of the power amplifier.

20. A method of biasing a power amplifier core stage of a power amplification device, comprising:
adjusting a gain of a sensed radio frequency signal;
generating an envelope tracking bias signal obtained at an output node of a source/emitter follower based envelope detector circuit, the envelope tracking bias signal based at least in part on the sensed radio frequency signal with the adjusted gain and a bias signal from a power amplifier bias circuit stage;
transmitting the envelope tracking bias signal to a power amplifier when the sensed radio frequency signal is applied to the source/emitter follower based envelope detector circuit; and
transmitting the envelope tracking bias signal to a center tap of a transformer coupled between the source/emitter follower based envelope detector circuit and the power amplifier.

21. The method of biasing the power amplifier core stage of claim 20 , further comprising filtering at the output node of the source/emitter follower based envelope detector circuit to obtain the envelope tracking bias signal and to reject the sensed radio frequency signal.

Assignees

• Qualcomm Inc

Inventors

• Chen Jiang
• Goldblatt Jeremy
• Cabanillas Jose

Classifications

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

• H03F1/32

  Modifications of amplifiers to reduce non-linear distortion (by negative feedback H03F1/34) · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

• H03F2200/69

  the amplifier stage being a common drain coupled MOSFET, i.e. source follower · CPC title

• H03G3/3042 Primary

  in modulators, frequency-changers, transmitters or power amplifiers · CPC title