Tri-layer semiconductor stacks for patterning features on solar cells

US10217878B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10217878-B2
Application numberUS-201615089381-A
CountryUS
Kind codeB2
Filing dateApr 1, 2016
Priority dateApr 1, 2016
Publication dateFeb 26, 2019
Grant dateFeb 26, 2019

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Abstract

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Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

First claim

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What is claimed is: 1. A back contact solar cell, comprising: a substrate; a semiconductor structure disposed above the substrate, the semiconductor structure comprising a P-type semiconductor layer disposed directly on a first semiconductor layer, and a third semiconductor layer disposed directly on the P-type semiconductor layer, wherein an outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width, and wherein an outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the first semiconductor layer to the outermost edge of the third semiconductor layer; and a conductive contact structure electrically connected to the semiconductor structure, wherein the semiconductor structure is vertically stacked with the first semiconductor layer between the P-type semiconductor layer and the substrate, the P-type semiconductor layer between the first and third semiconductor layers, and the third semiconductor layer between the P-type semiconductor layer and the conductive contact structure; wherein the first semiconductor layer is a first intrinsic silicon layer, the P-type semiconductor layer is a boron-doped silicon layer, and the third semiconductor layer is a second intrinsic silicon layer. 2. The back contact solar cell of claim 1 , wherein the first semiconductor layer has a thickness approximately equal to a thickness of the P-type semiconductor layer and approximately equal to a thickness of the third semiconductor layer. 3. The back contact solar cell of claim 1 , wherein the P-type semiconductor layer has a thickness greater than approximately 10% but less than approximately 90% of a total thickness of the semiconductor structure. 4. The back contact solar cell of claim 1 , wherein none of the first semiconductor layer, the P-type semiconductor layer, and the third semiconductor layer has a thickness less than approximately 10% of a total thickness of the semiconductor structure. 5. The back contact solar cell of claim 1 , wherein the first intrinsic silicon layer, the P-type semiconductor layer, and the second intrinsic silicon layer are amorphous layers. 6. The back contact solar cell of claim 1 , wherein the first intrinsic silicon layer, the P-type semiconductor layer, and the second intrinsic silicon layer are polycrystalline layers. 7. The back contact solar cell of claim 1 , wherein the first intrinsic silicon layer and the second intrinsic silicon layers each have a total dopant concentration of less than approximately 1E18 atoms/cm 3 , and the P-type semiconductor layer has a total boron concentration of greater than approximately 2E19 atoms/cm 3 . 8. The back contact solar cell of claim 1 , wherein the semiconductor structure is disposed on a tunneling dielectric layer disposed on the substrate. 9. The back contact solar cell of claim 1 , wherein the conductive contact structure is disposed in an opening of an anti-reflective coating layer disposed over the semiconductor structure. 10. The back contact solar cell of claim 1 , wherein the semiconductor structure is a P-type emitter region of the solar cell. 11. A back contact solar cell, comprising: a substrate; a semiconductor structure disposed above the substrate, the semiconductor structure comprising a second semiconductor layer disposed directly on a first semiconductor layer, and a third semiconductor layer disposed directly on the second semiconductor layer, wherein an outermost edge of the third semiconductor layer has a non-reentrant profile, an outermost edge of the second semiconductor layer has a non-reentrant profile extending beyond the outermost edge of the third semiconductor layer by a width, and an outermost edge of the first semiconductor layer has a non-reentrant profile and does not undercut the second semiconductor layer, and wherein the non-reentrant profiles of the first and third semiconductor layers are steeper than the non-reentrant profile of the second semiconductor layer; and a conductive contact structure electrically connected to the semiconductor structure, wherein the semiconductor structure is vertically stacked with the first semiconductor layer between the second semiconductor layer and the substrate, the second semiconductor layer between the first and third semiconductor layers, and the third semiconductor layer between the second semiconductor layer and the conductive contact structure; wherein the first semiconductor layer is a first intrinsic silicon layer, the second semiconductor layer is a P-type boron-doped silicon layer, and the third semiconductor layer is a second intrinsic silicon layer. 12. The back contact solar cell of claim 11 , wherein the first and the third semiconductor layers each have a total dopant concentration of less than approximately 1E18 atoms/cm 3 , and the P-type silicon layer has a total boron concentration of greater than approximately 2E19 atoms/cm 3 .

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What does patent US10217878B2 cover?
Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly…
Who is the assignee on this patent?
Sunpower Corp
What technology area does this patent fall under?
Primary CPC classification H01L31/022441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).