Semiconductor device with a bump contact on a TSV comprising a cavity and method of producing such a semiconductor device

Patent metadata

Field	Value
Publication number	US-10217715-B2
Application number	US-201515118469-A
Country	US
Kind code	B2
Filing date	Feb 9, 2015
Priority date	Feb 12, 2014
Publication date	Feb 26, 2019
Grant date	Feb 26, 2019

Abstract

The semiconductor device comprises a semiconductor substrate ( 1 ) with a main surface ( 10 ) and a further main surface ( 11 ) opposite the main surface, a TSV ( 3 ) penetrating the substrate from the main surface to the further main surface, a metallization ( 13 ) of the TSV, an under-bump metallization ( 5 ) and a bump contact ( 6 ) at least partially covering the TSV at the further main surface. The TSV ( 3 ) comprises a cavity ( 15 ), which may be filled with a gas or liquid. An opening ( 15 ′) of the cavity is provided to expose the cavity to the environment.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a semiconductor substrate having a main surface and a further main surface opposite the main surface;
a TSV penetrating the substrate from the main surface to the further main surface;
a cavity of the TSV;
an under-bump metallization arranged adjacent to the cavity at the further main surface;
a bump contact arranged on the under-bump metallization, the bump contact covering the cavity at least partially;
a metallization of the TSV being arranged between the substrate and the cavity;
an opening of the cavity at the main surface or at the further main surface, the opening providing a communication between the cavity and an environment;
a cover layer being arranged above the TSV at the main surface; and
a hole in the cover layer, the opening being provided by the hole.

2. The semiconductor device of claim 1 , further comprising:
an integrated circuit component in the semiconductor substrate, the integrated circuit component being provided with a wiring including at least one metal layer arranged in the cover layer.

3. A semiconductor device comprising:
a semiconductor substrate having a main surface and a further main surface opposite the main surface;
a TSV penetrating the substrate from the main surface to the further main surface;
a cavity of the TSV;
an under-bump metallization arranged adjacent to the cavity at the further main surface;
a bump contact arranged on the under-bump metallization, the bump contact covering the cavity at least partially;
a metallization of the TSV being arranged between the substrate and the cavity; and
an opening of the cavity at the main surface or at the further main surface, the opening providing a communication between the cavity and an environment,
wherein the cavity of the TSV is filled with a gas or a liquid.

4. A method of producing a semiconductor device, comprising:
providing a semiconductor substrate with a TSV penetrating the substrate from a main surface to an opposite further main surface;
arranging a metallization in the TSV, forming a cavity;
arranging an under-bump metallization adjacent to the TSV at the further main surface;
arranging a bump contact on the under-bump metallization;
arranging the metallization between the substrate and the cavity;
forming an opening of the cavity at the main surface or at the further main surface to provide a communication between the cavity and an environment;
arranging a cover layer above the TSV at the main surface; and
forming the opening by a hole in the cover layer.

5. A method of producing a semiconductor device, comprising:
providing a semiconductor substrate with a TSV penetrating the substrate from a main surface to an opposite further main surface;
arranging a metallization in the TSV, forming a cavity;
arranging an under-bump metallization adjacent to the TSV at the further main surface;
arranging a bump contact on the under-bump metallization;
arranging the metallization between the substrate and the cavity; and
forming an opening of the cavity at the main surface or at the further main surface to provide a communication between the cavity and an environment,
wherein the opening is formed by structuring the under-bump metallization, so that the under-bump metallization forms a channel between the cavity and the environment,
wherein a predetermined breaking point comprising a material different from the under-bump metallization is arranged at the location provided for the channel, and
wherein the material of the predetermined breaking point is cracked or made porous during or after the formation of the bump contact, so that the channel is formed.

6. The method of claim 5 , wherein the predetermined breaking point is formed by a material that cracks or becomes porous at a temperature above 200° C., and the bump contact is formed by a reflow process at a temperature above 200° C.

7. The method of claim 6 , wherein the predetermined breaking point is formed by a photoresist.

8. A semiconductor device comprising:
a semiconductor substrate having a main surface and a further main surface opposite the main surface;
a TSV penetrating the substrate from the main surface to the further main surface;
a cavity of the TSV;
a metallization of the TSV arranged between the substrate and the cavity;
an under-bump metallization arranged adjacent to the cavity at the further main surface, the under-bump metallization not encircling the cavity;
a bump contact arranged on the under-bump metallization, the bump contact at least partially covering the cavity without closing it, thus providing a communication between the cavity and an environment;
a cover layer being arranged above the TSV at the main surface; and
an integrated circuit component in the semiconductor substrate, the integrated circuit component being provided with a wiring including at least one metal layer arranged in the cover layer.

9. A semiconductor device comprising:
a semiconductor substrate having a main surface and a further main surface opposite the main surface;
a TSV penetrating the substrate from the main surface to the further main surface;
a cavity of the TSV;
a metallization of the TSV arranged between the substrate and the cavity;
an under-bump metallization arranged adjacent to the cavity at the further main surface, the under-bump metallization not encircling the cavity; and
a bump contact arranged on the under-bump metallization, the bump contact at least partially covering the cavity without closing it, thus providing a communication between the cavity and an environment,
wherein the cavity of the TSV is filled with a gas or a liquid.

10. The semiconductor device of claim 3 , further comprising:
a cover layer being arranged above the TSV at the main surface; and
an integrated circuit component in the semiconductor substrate, the integrated circuit component being provided with a wiring including at least one metal layer arranged in the cover layer.

Assignees

• Ams Ag

Inventors

• Schrems Martin
• Stering Bernhard
• Etschmaier Harald

Classifications

• H10W72/01904

  using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates · CPC title

• H10W72/983

  Reinforcing structures, e.g. collars · CPC title

• H10W72/951

  Materials of bond pads · CPC title

• H10W72/942

  relative to underlying supporting features, e.g. bond pads, RDLs or vias · CPC title

• H10W72/932

  Plan-view shape, i.e. in top view · CPC title