Diagnostic fault communication

US10216559B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10216559-B2
Application numberUS-201615350400-A
CountryUS
Kind codeB2
Filing dateNov 14, 2016
Priority dateNov 14, 2016
Publication dateFeb 26, 2019
Grant dateFeb 26, 2019

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  5. First independent claim

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Abstract

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Described embodiments provide circuits, systems and methods for detecting and communicating fault conditions. In an embodiment, an integrated circuit includes a fault detector to detect a fault condition of the integrated circuit and a controller to generate output data of the integrated circuit. An output generator generates an output signal of the integrated circuit. The output signal is generated at a first set of output levels based upon the output data when the fault detector does not detect the fault condition, and the output signal is generated at a second set of output levels based upon the output data when the fault detector detects the fault condition.

First claim

Opening claim text (preview).

I claim: 1. An integrated circuit comprising: a fault detector configured to detect a fault condition of the integrated circuit; a controller configured to generate a controller output data signal; and an output generator configured to generate an output signal of the integrated circuit and to: generate the output signal at a first set of output levels based upon the controller output data signal when the fault detector does not detect the fault condition; and generate the output signal at a second set of output levels based upon the controller output data signal when the fault detector detects the fault condition, wherein the second set of output levels is different than the first set of output levels and comprises a level of the output signal caused by an open circuit or a short circuit of the output signal. 2. The integrated circuit of claim 1 , wherein the first set of output levels comprises an output low level and an output high level, and wherein the second set of output levels comprises a fault low output level and a fault high output level. 3. The integrated circuit of claim 2 , wherein the fault low output level is lower than the output low level and wherein the fault high output level is higher than the output high level. 4. The integrated circuit of claim 2 , wherein the output generator is further configured to generate the output signal at a middle output level when a selected fault condition is detected. 5. The integrated circuit of claim 4 , wherein the middle output level is between the output low level and the output high level. 6. The integrated circuit of claim 1 , wherein the fault detector is configured to cause the output signal to be at the second set of output levels to indicate the detected fault, and wherein the fault detector is configured to cause the output signal to be at the first set of output levels to indicate that the fault condition is not detected. 7. The integrated circuit of claim 6 , wherein, once the fault condition is detected, the fault detector is configured to maintain the output signal at the second set of output levels until the integrated circuit is reset. 8. The integrated circuit of claim 2 , wherein the output generator comprises: a fault signal generator configured to generate a fault output signal based upon the controller output data signal, the first set of output levels, the second set of output levels, and a fault indicator; an amplifier configured to generate an amplified output signal based upon the fault output signal and a feedback signal; and a switching element configured to generate the output signal based upon the amplified output signal. 9. The integrated circuit of claim 8 , wherein the fault signal generator comprises: a first multiplexer configured to select, based upon the fault indicator, between the output high level of the first set of output levels and the fault high output level of the second set of output levels to generate a selected high signal; a second multiplexer configured to select, based upon the fault indicator, between the output low level of the first set of output levels and the fault low output level of the second set of output levels to generate a selected low signal; and a third multiplexer configured to select, based upon the controller output data signal, between the selected high signal and the selected low signal to generate the fault output signal. 10. The integrated circuit of claim 1 , wherein the integrated circuit comprises a magnetic field sensor configured to sense at least one of an absolute position, a relative position, a direction of movement, a speed of movement, a direction of rotation, or a speed of rotation of a ferromagnetic object located proximate to the integrated circuit. 11. The integrated circuit of claim 10 , wherein the integrated circuit is configured for use as a sensor in a vehicle, and wherein the output signal of the integrated circuit is coupled to a vehicle controller. 12. The integrated circuit of claim 11 , wherein the vehicle controller is configured to decode a fault condition when the output signal is at the second set of output levels and process the fault condition in accordance with an Automotive Safety Integrity Level (ASIL) standard. 13. The integrated circuit of claim 11 , wherein the fault detector is configured to detect fault conditions comprising one or more of: a voltage of the integrated circuit being out of an expected range, and a magnetic field sensed by the magnetic field sensor being out of an expected range. 14. A sensor comprising: at least one magnetic field sensing element configured to generate a magnetic field signal indicative of a magnetic field sensed by the at least one magnetic field sensing element; an analog-to-digital converter (ADC) configured to generate a digital magnetic field value associated with the magnetic field signal; a controller configured to: receive the digital magnetic field value and generate a sensed speed signal; detect diagnostic faults of the sensor and generate a fault output signal based upon the detected diagnostic faults; and an output generator configured to generate a sensor output signal and to: receive the sensed speed signal and the fault output signal; generate the sensor output signal at a first set of output levels based upon the sensed speed signal and a first value of the fault output signal; and generate the sensor output signal at a second set of output levels based upon the sensed speed signal and a second value of the fault output signal, wherein the first set of output levels comprises an output low level and an output high level, and wherein the second set of output levels comprises a fault low output level and a fault high output level and wherein the fault low output level is lower than the output low level and wherein the fault high output level is higher than the output high level. 15. The sensor of claim 14 , wherein the output generator is further configured to generate the output signal at a middle output level when a selected diagnostic fault is detected, wherein the middle output level is between the output low level and the output high level. 16. The sensor of claim 14 , wherein, once a diagnostic fault is detected, the controller is configured to maintain the output signal at the second set of output levels until the controller is reset. 17. The sensor of claim 14 , wherein the output generator comprises: a fault signal generator configured to generate a fault output signal based upon the sensed speed signal, the fault output signal, the first set of output levels, and the second set of output levels; an amplifier configured to generate an amplified output signal based upon the fault output signal and a feedback signal; and a switching element configured to generate the output signal based upon the amplified output signal. 18. The sensor of claim 17 , wherein the fault signal generator comprises: a first multiplexer configured to select, based upon the fault output signal, between the output high level of the first set of output levels and the fault high output level of the second set of output levels to generate a selected high signal; a second multiplexer configured to select, based upon the fault output signal, between the output low level of the first set of output levels and the fault low output level of the second set of output levels to generate a selected low signal; and a third multiplexer configured to select, based upon the sensed speed signal, between the selected high signal and the selected low signal t

Assignees

Inventors

Classifications

  • using feed-back or modulation techniques · CPC title

  • in a data processing system embedded in automotive or aircraft systems · CPC title

  • Treating the measured signals, e.g. removing offset or noise · CPC title

  • Electronic aspects, e.g. circuits for stimulation, evaluation, control; Treating the measured signals; calibration (G01R33/0017 takes precedence) · CPC title

  • Constructional adaptation of the sensor to specific applications · CPC title

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What does patent US10216559B2 cover?
Described embodiments provide circuits, systems and methods for detecting and communicating fault conditions. In an embodiment, an integrated circuit includes a fault detector to detect a fault condition of the integrated circuit and a controller to generate output data of the integrated circuit. An output generator generates an output signal of the integrated circuit. The output signal is gene…
Who is the assignee on this patent?
Allegro Microsystems Llc
What technology area does this patent fall under?
Primary CPC classification G06F11/0739. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 26 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).