Circuit and method for high-accuracy current sensing

Patent metadata

Field	Value
Publication number	US-10205378-B2
Application number	US-201615268817-A
Country	US
Kind code	B2
Filing date	Sep 19, 2016
Priority date	Nov 16, 2015
Publication date	Feb 12, 2019
Grant date	Feb 12, 2019

Abstract

A circuit for providing a current flowing from a supply voltage into an electric load is presented. The circuit comprises a first circuit branch connected between the supply voltage and an output node connected to the electric load, wherein the first circuit branch comprises a first transistor device, a second circuit branch connected between the supply voltage and a predetermined voltage level, wherein the second circuit branch comprises a series connection of a second transistor device that is a scaled replica of the first transistor device and a current source. The control terminals of the first and second transistor devices are connected to each other. A control circuit is configured to control the voltage at the control terminal of the first transistor device depending on a current flowing through the first transistor device. The application further relates to a method of operating such circuit.

First claim

What is claimed is:

1. A charging circuit for providing a charge current flowing from a supply voltage into an electric load, the circuit comprising:
a first circuit branch connected between the supply voltage and an output node connectable to the electric load, the first circuit branch comprising a first transistor device;
a second circuit branch connected between the supply voltage and a predetermined voltage level, the second circuit branch comprising a series connection of a second transistor device that is a scaled replica of the first transistor device and a current source, wherein the current source is connected to an output terminal of a second transistor device, and wherein control terminals of the first and second transistor devices are connected to each other;
a feedback circuit that receives voltages at respective output terminals of the first transistor device and the second transistor device as input voltages, wherein the feedback circuit is configured to perform feedback control to equalize said input voltages and wherein the feedback circuit is configured to perform voltage equalization by control of the supply voltage; and
a control circuit for controlling a voltage at the control terminal of the first transistor device, wherein the control circuit is configured to control said voltage at the control terminal of the first transistor device based on a quantity indicative of or depending on a current flowing through the first transistor device.

2. The circuit according to claim 1 , wherein the control circuit is configured to control said voltage at the control terminal of the first transistor device based on a quantity indicative of a current generated by the current source.

3. The circuit according to claim 2 ,
wherein the current source is a controllable current source; and
the control circuit is configured to control said voltage at the control terminal of the first transistor device based on a control value for controlling the controllable current source.

4. The circuit according to claim 1 , wherein the control circuit is configured to control said voltage at the control terminal of the first transistor device based on a voltage difference between a voltage at an input terminal of the first transistor device and the voltage at the output terminal of the first transistor device.

5. The circuit according to claim 4 , wherein the control circuit is configured to control said voltage at the control terminal of the first transistor device to a first voltage if said voltage difference is above a first threshold voltage, and to a second voltage different from the first voltage if said voltage difference is below the first threshold voltage.

6. The circuit according to claim 5 , wherein the second voltage is chosen such that an on-state resistance of the first transistor device between its input terminal and output terminal increases when said voltage at the control terminal of the first transistor device changes from the first voltage to the second voltage.

7. The circuit according to claim 5 , wherein the control circuit is further configured to control said voltage at the control terminal of the first transistor device to a third voltage different from the first and second voltages if said voltage difference is above a second threshold voltage that is larger than the first threshold voltage.

8. The circuit according to claim 7 , wherein the third voltage is chosen such that an on-state resistance of the first transistor device between its input terminal and output terminal decreases when said voltage at the control terminal of the first transistor device changes from the first voltage to the third voltage.

9. The circuit according to 5 , wherein the control circuit comprises:
an analog-to-digital converter, ADC, for converting said voltage difference to a digital signal;
a digital processing circuit for processing the digital signal; and
a digital-to-analog converter, DAC, for converting an output signal of the digital processing circuit to a voltage for application to the control terminal of the first transistor device.

10. The circuit according to claim 9 , wherein the ADC comprises a first comparator with a first offset.

11. The circuit according to claim 9 , wherein the ADC comprises a second comparator with a second offset different from the first offset.

12. A method of controlling a charging circuit for providing a charge current flowing from a supply voltage into an electric load, comprising the steps of:
providing a first transistor device connected between the supply voltage and an output node connectable to the electric load; and
providing a series connection of a second transistor device that is a scaled replica of the first transistor device and a current source, connected between the supply voltage and a predetermined voltage level, wherein the current source is connected to an output terminal of the second transistor device, and wherein control terminals of the first and second transistor devices are connected to each other,
performing feedback control to equalize voltages at respective output terminals of the first transistor device and the second transistor device, wherein voltage equalization is performed by controlling the supply voltage; and
controlling a voltage at the control terminal of the first transistor device based on a quantity indicative of or depending on a current flowing through the first transistor device.

13. The method according to claim 12 , said controlling a voltage involves controlling said voltage at the control terminal of the first transistor device based on a quantity indicative of a current generated by the current source.

14. The method according to claim 13 ,
wherein the current source is a controllable current source; and
said controlling a voltage involves controlling said voltage at the control terminal of the first transistor device based on a control value for controlling the controllable current source.

15. The method according to claim 12 , said controlling a voltage involves controlling said voltage at the control terminal of the first transistor device based on a voltage difference between a voltage at an input terminal of the first transistor device and the voltage at the output terminal of the first transistor device.

16. The method according to claim 15 , wherein said controlling a voltage further involves controlling said voltage at the control terminal of the first transistor device to a first voltage if said voltage difference is above a first threshold voltage, and to a second voltage different from the first voltage if said voltage difference is below the first threshold voltage.

17. The method according to claim 16 , wherein said controlling a voltage further involves controlling said voltage at the control terminal of the first transistor device to a third voltage different from the first and second voltages if said voltage difference is above a second threshold voltage that is larger than the first threshold voltage.

18. The method according to claim 16 , wherein the second voltage is chosen such that an on-state resistance of the first transistor device between its input terminal and output terminal increases when said voltage at the control terminal of the first transistor device changes from the first voltage to the second voltage.

19. The method according to claim 17 , wherein the third voltage is chosen such that an on-state resistance of the first transistor device between its input terminal and output terminal decreases when said voltage at t

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Gerna Danilo
• Pardi Enrico

Classifications

• H02J7/00

  Circuit arrangements for charging or discharging batteries or for supplying loads from batteries · CPC title

• H02M1/088 Primary

  for the simultaneous control of series or parallel connected semiconductor devices · CPC title

• H03M1/0607

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title

• G01R19/0092 Primary

  Measuring current only · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title