Coupled-domains disturbance matrix generation for fast simulation of wafer topography proximity effects

US10204197B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10204197-B2
Application numberUS-201615339447-A
CountryUS
Kind codeB2
Filing dateOct 31, 2016
Priority dateOct 31, 2016
Publication dateFeb 12, 2019
Grant dateFeb 12, 2019

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Abstract

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A coupled-domains method for generating disturbance matrices used in correcting topography proximity effects (TPE) for integrated circuit (IC) designs that include inhomogeneous substrates. The IC design is modeled and divided into domains (z-direction regions), each domain defined by upper/lower horizontal domain boundaries and optical properties generated by its associated geometry and material composition. Fourier-space representations are utilized to determine discrete electrical and magnetic field components for each domain that are integrated to derive domain transfer matrices, which are then multiplied to produce a total transfer matrix, which is then used to generate the disturbance matrix. The disturbance matrix may then be utilized by a model-based mask correction tool to calculate light intensity values in the photoresist layer. The corrected mask design is then used to generate a physical mask utilized in the subsequent fabrication of an IC device based on the IC design.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for generating a disturbance matrix that describes E-field disturbances generated by optical properties of an inhomogeneous substrate defined by an integrated circuit (IC) design, said inhomogeneous substrate including a plurality of materials forming a plurality of layers and a plurality of structures disposed in said layers, wherein said generated disturbance matrix is configured for utilization by a model-based mask correction tool configured generate a modified mask design for use in the subsequent production of a physical mask that is used during fabrication of an integrated circuit device based on the IC design, the method including: generating a three-dimensional (3D) substrate description based on the IC design, said 3D substrate description including a modeled inhomogeneous substrate generated in accordance with said inhomogeneous substrate such that all upward/downward-facing material interfaces formed between said pluralities of layers and structures of said inhomogeneous substrate are defined by corresponding planar horizontal interfaces between corresponding modeled layers and modeled structures of said modeled inhomogeneous substrate; dividing the 3D substrate description into a plurality of vertically arranged domains separated by horizontal planar domain boundaries, each said domain defined by optical properties of one or more materials of said plurality of materials corresponding to at least one of a corresponding said modeled structure and a corresponding said modeled layer disposed in said each domain; and generating said disturbance matrix such that said disturbance matrix provides a total reflected electric field generated in response to a modeled incident electric field that is directed onto said modeled inhomogeneous substrate, wherein generating the disturbance matrix comprises: utilizing Fourier-space representations to determine discrete electrical field components and discrete magnetic field components at the top domain boundary and the bottom domain boundary of at least one said domain; numerically integrating the discrete electrical field components and discrete magnetic field components of said each domain to obtain a corresponding domain-specific matrix for said at least one domain; generating a domain transfer matrix for said at least one domain based on said corresponding domain-specific matrix such that each said domain transfer matrix defines a first pair of forward and backward propagating wave values occurring at the top domain boundary of said at least one domain in response to a corresponding second pair of forward and backward propagating wave values simultaneously occurring at the bottom domain boundary of said at least one domain; multiplying the transfer matrices of all of the plurality of domains to generate a total transfer matrix; and utilizing the total transfer matrix to determine said disturbance matrix. 2. The method of claim 1 , wherein generating the three-dimensional (3D) substrate description further comprises generating a modeled photoresist layer over said modeled inhomogeneous substrate, wherein dividing the 3D substrate description into said plurality of vertically arranged domains comprises forming an uppermost domain having a corresponding top domain boundary defined by an upper surface of said modeled photoresist layer, said dividing the 3D substrate description being performed such that a corresponding said domain boundary coincides with each said planar horizontal interface of said 3D substrate description, and wherein generating said disturbance matrix comprises providing a function for calculating said total reflected electric field in response to said modeled incident electric field directed onto said corresponding top domain boundary of said uppermost domain. 3. The method of claim 1 , wherein utilizing Fourier-space representations to determine said discrete electrical field components and said discrete magnetic field components comprises utilizing the equations: d ⁢ ⁢ E ~ x dz = i ⁢ ω c ⁢ μ ~ * H ~ y - k x ⁢ c ω ⁢ ℱ ⁡ [ 1 ɛ ⁢ ( ∂ H y ∂ x - ∂ H x ∂ y ) ] ( 1 ) d ⁢ ⁢

Assignees

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Classifications

  • Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

  • G06F30/367Primary

    Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods · CPC title

  • G03F1/70Primary

    Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging · CPC title

  • Physics · mapped topic

  • Physics · mapped topic

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What does patent US10204197B2 cover?
A coupled-domains method for generating disturbance matrices used in correcting topography proximity effects (TPE) for integrated circuit (IC) designs that include inhomogeneous substrates. The IC design is modeled and divided into domains (z-direction regions), each domain defined by upper/lower horizontal domain boundaries and optical properties generated by its associated geometry and materi…
Who is the assignee on this patent?
Synopsys Inc
What technology area does this patent fall under?
Primary CPC classification G06F30/367. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 12 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).