System and method for a transducer

Patent metadata

Field	Value
Publication number	US-10200801-B2
Application number	US-201715843915-A
Country	US
Kind code	B2
Filing date	Dec 15, 2017
Priority date	Sep 15, 2014
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

According to an embodiment, a transducer system includes a transducing element and a symmetry detection circuit. The transducing element includes a signal plate, a first sensing plate, and a second sensing plate. The symmetry detection circuit is coupled to a differential output of the transducer element and is configured to output an error signal based on asymmetry in the differential output.

First claim

What is claimed is:

1. A transducer system comprising:
a symmetry detection circuit configured to be coupled to a differential output of a transducer element, the symmetry detection circuit configured to determine a common mode component of the differential output, generate a first difference signal between a first component and a second component of the differential output, and determine a ratio of the first difference signal to the common mode component, produce an error signal based on the determined ratio, and activate a repair circuit configured to repair a pull-in condition of the transducer element when the error signal exceeds a predetermined value.

2. The transducer system of claim 1 , wherein the symmetry detection circuit comprises a resistive divider connected between positive and negative output terminals supplying the differential output.

3. The transducer system of claim 2 , wherein the symmetry detection circuit further comprises a filter coupled to the resistive divider.

4. The transducer system of claim 3 , wherein the symmetry detection circuit further comprises:
a first adder coupled to the positive and negative output terminals, the first adder configured to calculate the first difference signal from signals on the positive and negative output terminals;
a first logarithmic amplifier coupled to the filter;
a second logarithmic amplifier coupled to an output of the first adder and configured to receive the first difference signal; and
a second adder coupled to the first logarithmic amplifier and the second logarithmic amplifier, the second adder configured to calculate a second difference signal from outputs of the first logarithmic amplifier and the second logarithmic amplifier.

5. The transducer system of claim 1 , further comprising the repair circuit configured to be coupled to the transducer element and coupled to the symmetry detection circuit, the repair circuit configured to alter a charge level on a signal plate of the transducer element, a first sensing plate of the transducer element, or a second sensing plate of the transducer element based on the error signal, wherein the altered charge level is configured to repair the pull-in condition of the transducer element.

6. The transducer system of claim 5 , wherein the repair circuit comprises:
a first reset switch configured to be coupled between the signal plate and a low reference supply;
a second reset switch configured to be coupled between the first sensing plate and the low reference supply; and
a third reset switch configured to be coupled between the second sensing plate and the low reference supply, wherein the first, second, and third reset switches are controlled based on the error signal.

7. The transducer system of claim 5 , wherein the repair circuit comprises:
a first charge distribution unit having a first terminal configured to be coupled to the signal plate and a second terminal configured to be coupled to the first sensing plate, wherein the first charge distribution unit is configured to receive the error signal; and
a second charge distribution unit having a first terminal configured to be coupled to the signal plate and a second terminal configured to be coupled to the second sensing plate, wherein the second charge distribution unit is configured to receive the error signal.

8. The transducer system of claim 7 , wherein the first charge distribution unit and the second charge distribution unit each comprise a first switch, a capacitor, and a second switch coupled in series between the first terminal and the second terminal of the respective charge distribution unit, and wherein the first switch and second switch in both the first charge distribution unit and the second charge distribution unit are switched based on the error signal.

9. The transducer system of claim 5 , wherein the repair circuit comprises:
a first disconnect switch configured to be coupled between the first sensing plate and additional processing circuits; and
a second disconnect switch configured to be coupled between the second sensing plate and the additional processing circuits, wherein the first disconnect switch and the second disconnect switch are controlled based on the error signal.

10. The transducer system of claim 1 , further comprising:
a bias circuit configured to be coupled to a signal plate of the transducer element;
a first amplifier configured to be coupled between a first sensing plate of the transducer element and a first terminal of the differential output; and
a second amplifier configured to be coupled between a second sensing plate of the transducer element and a second terminal of the differential output.

11. The transducer system of claim 10 , wherein the transducer element, the first amplifier, and the second amplifier are disposed on a same integrated circuit.

12. A method of operating a transducer system, the method comprising:
receiving a differential output signal from a differential capacitive transducer based on a sensed input signal;
determining a common mode signal of the differential output signal;
generating a symmetry signal based on the determined common mode signal, generating the symmetry signal comprising generating a difference signal between a first component and a second component of the differential output signal, and determining a ratio of the difference signal to the common mode signal;
comparing the symmetry signal to an error condition characteristic; and
repairing a pull-in condition of the differential capacitive transducer if the comparing indicates an error condition.

13. The method of claim 12 , wherein repairing the differential capacitive transducer comprises coupling a capacitive plate of the differential capacitive transducer to a ground connection.

14. The method of claim 12 , wherein repairing the differential capacitive transducer comprises adjusting a voltage on a capacitive plate of the differential capacitive transducer below a pull-out voltage.

15. The method of claim 12 , wherein repairing the differential capacitive transducer comprises disconnecting a capacitive plate of the differential capacitive transducer from an output circuit.

16. The method of claim 12 , further comprising filtering the common mode signal.

17. The method of claim 12 , wherein the symmetry signal is proportional to a logarithmic equation:
log( D 1− D 2)−log(CM), wherein

D 1 is the first component of the differential output signal,
D 2 is the second component of the differential output signal, and
CM is the common mode signal.

18. The method of claim 12 , wherein determining the common mode signal comprises using a common mode measurement circuit having a first input configured to be coupled to a first terminal of the differential capacitive transducer, a second input configured to be coupled to a second terminal do the differential capacitive transducer, and an output configured to provide the determined common mode signal.

19. A system comprising:
a symmetry detection circuit configured to be coupled to a coupled to a differential output of a transducer element, the symmetry detection circuit configured to output an error signal based on asymmetry in the differential output, wherein the symmetry detection circuit comprises
a resistive divider connected between positive and negative output terminals supplying the differential output,
a filter coupled to the resistive divider,
a first adder coupled to the positive and negative output terminals, the first adder configured to calculate a first d

Assignees

• Infineon Technologies Ag

Inventors

• Wiesbauer Andreas
• Jenkner Christian
• Krumbein Ulrich
• Füldner Marc

Classifications

• H04R29/004 Primary

  for microphones (H04R29/007 takes precedence) · CPC title

• H04R2201/003

  Mems transducers or their use · CPC title