Code reconstruction scheme for multiple code rate TPC decoder

US10200066B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10200066-B2
Application numberUS-201715433850-A
CountryUS
Kind codeB2
Filing dateFeb 15, 2017
Priority dateMar 9, 2016
Publication dateFeb 5, 2019
Grant dateFeb 5, 2019

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Abstract

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An apparatus for decoding is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to obtain a first codeword comprising one or more information bits and one or more parity bits, obtain a first parameter corresponding to a code rate of the first codeword, and decode the first codeword using a multi-rate decoder to generate a decoded codeword. The multi rate decoder performs a code reconstruction procedure on the first codeword to generate a reconstructed codeword, and decodes the reconstructed codeword. The processor is further configured to output the decoded codeword.

First claim

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What is claimed is: 1. An apparatus for decoding, comprising: a memory; at least one processor coupled to the memory, the at least one processor configured to: obtain a first codeword comprising one or more information bits and one or more parity bits; obtain a first parameter corresponding to a code rate of the first codeword; decode the first codeword using a multi-rate decoder to generate a decoded codeword, wherein the multi rate decoder performs a code reconstruction procedure on the first codeword to generate a reconstructed codeword, wherein the code reconstruction procedure is based at least on the first parameter, and wherein the multi rate decoder supports multiple code rates with a lookup table and decodes the reconstructed codeword based at least on the lookup table; and output the decoded codeword. 2. The apparatus of claim 1 , wherein the first codeword corresponds to a turbo product code (TPC). 3. The apparatus of claim 1 , wherein the code reconstruction procedure is based at least on the first parameter and a code rate of a base code. 4. The apparatus of claim 3 , wherein the base code comprises a base code rate, wherein the base code rate corresponds to the lowest supported code rate by the multi-rate decoder. 5. The apparatus of claim 4 , wherein the processor configured to perform code reconstruction procedure is further configured to: add one or more zero bits to the first codeword to generate an intermediate codeword; determine a second parameter corresponding to a number of bit locations that the intermediate codeword is to be cyclically shifted in a first direction based on the first parameter and a code rate of the base code rate; and cyclically shift the intermediate codeword based on a value of the second parameter to generate the reconstructed codeword. 6. The apparatus of claim 1 , wherein a starting bit location of the one or more information bits in a second codeword is aligned with a predetermined bit location. 7. The apparatus of claim 6 , wherein the predetermined bit location corresponds to a starting bit location of information bits in a base code of the multi-rate decoder. 8. The apparatus of claim 1 , wherein the first codeword comprises a Bose-Chaudhuri-Hocquenghem (BCH) code. 9. A method for decoding, comprising: obtaining, by a system, a first codeword comprising one or more information bits and one or more parity bits from a memory; obtaining, by the system, a first parameter corresponding to a code rate of the first codeword; generating a decoded codeword using a multi-rate decoder and the first codeword; reconstructing the first codeword, wherein the reconstructing generates a reconstructed codeword by using the multi rate decoder to reconstruct the first codeword based at least on the first parameter, and wherein the multi rate decoder supports multiple code rates with a lookup table and decodes the reconstructed codeword based at least on the lookup table; and outputting, by the system, the decoded codeword. 10. The method of claim 9 , wherein the first codeword corresponds to a turbo product code (TPC). 11. The method of claim 9 , wherein reconstructing the first codeword is based at least on the first parameter and a code rate of a base code. 12. The method of claim 11 , wherein the base code comprises a base code rate, wherein the base code rate corresponds to the lowest supported code rate by the multi-rate decoder. 13. The method of claim 12 , further comprising: adding, by the system, one or more zero bits to the first codeword to generate an intermediate codeword; determining, by the system, a second parameter corresponding to a number of bit locations that the intermediate codeword is to be cyclically shifted in a first direction based on the first parameter and a code rate of the base code rate; and cyclically, by the system, shifting the intermediate codeword based on a value of the second parameter to generate the reconstructed codeword. 14. The method of claim 9 , wherein a starting bit location of the one or more information bits in a second codeword is aligned with a predetermined bit location. 15. The method of claim 14 , wherein the predetermined bit location corresponds to a starting bit location of information bits in a base code of the multi-rate decoder. 16. The method of claim 9 , wherein the first codeword comprises a Bose-Chaudhuri-Hocquenghem (BCH) code. 17. The method of claim 9 , wherein the lookup table indicates an adjustments to syndrome values based on bit locations, and wherein the lookup table associates an adjustment factor with a code rate, and wherein reconstructing the first codeword comprises adjusting, by the multi-rate decoder, a syndrome value of the first codeword based at least on the lookup table. 18. A non-transitory computer-readable storage medium comprising instructions that, upon execution by a processor of a computing device, configure the computing device to perform operations comprising: obtaining a first codeword comprising one or more information bits and one or more parity bits; obtaining a first parameter corresponding to a code rate of the first codeword; decoding the first codeword using a multi-rate decoder to generate a decoded codeword, wherein the multi rate decoder performs a code reconstruction procedure on the first codeword to generate a reconstructed codeword, wherein the code reconstruction procedure is based at least on the first parameter, and wherein the multi rate decoder supports multiple code rates with a lookup table and decodes the reconstructed codeword based at least on a lookup table; and outputting the decoded codeword. 19. The non-transitory computer-readable storage medium of claim 18 , wherein the operations further comprise: adding, by the computing device, one or more zero bits to the first codeword to generate an intermediate codeword; determining, by the computing device, a second parameter corresponding to a number of bit locations that the intermediate codeword is to be cyclically shifted in a first direction based on the first parameter and a code rate of a base code rate; and cyclically, by the computing device, shifting the intermediate codeword based on a value of the second parameter to generate the reconstructed codeword. 20. The non-transitory computer-readable storage medium of claim 18 , wherein a starting bit location of the one or more information bits in a second codeword is aligned with a predetermined bit location.

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Inventors

Classifications

  • Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields · CPC title

  • Bose-Chaudhuri-Hocquenghem [BCH] codes · CPC title

  • Determination of error locations, e.g. Chien search or other methods or arrangements for the determination of the roots of the error locator polynomial · CPC title

  • Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes · CPC title

  • Shortening and extension of codes · CPC title

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What does patent US10200066B2 cover?
An apparatus for decoding is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to obtain a first codeword comprising one or more information bits and one or more parity bits, obtain a first parameter corresponding to a code rate of the first codeword, and decode the first codeword using a multi-rate decoder to generate a decoded codewo…
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H03M13/2963. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).