POWER-OVER-ETHERNET (PoE) CONTROL SYSTEM
US-2015042243-A1 · Feb 12, 2015 · US
US10199989B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10199989-B2 |
| Application number | US-201514850531-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 10, 2015 |
| Priority date | Sep 10, 2014 |
| Publication date | Feb 5, 2019 |
| Grant date | Feb 5, 2019 |
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Described examples include Ethernet physical layer (PHY) interface integrated circuits with transmit interface circuitry for transmitting data to an Ethernet network through a magnetic interface, which includes a voltage mode first amplifier with an output that generates a first voltage signal from a supply voltage according to a data input signal. The transmit interface circuit also includes a feedforward second amplifier circuit with an output stage that operates in a first mode to generate a current signal from the supply voltage according to the first voltage signal and to provide the current signal to the first amplifier output to boost a peak voltage at the output above the supply voltage to facilitate support for higher peak signal voltage swings for 10Base-T applications while using 2.5 volt or other low voltage supply levels.
Opening claim text (preview).
What is claimed is: 1. A physical layer (PHY) network interface integrated circuit (IC) to interface a host system with a network, comprising: a transceiver circuit to receive outgoing data from a media independent interface of the host system, and to send transmit data to the network according to the outgoing data, the transceiver circuit comprising a transmit interface circuit, the transmit interface circuit including: a first amplifier circuit including a first amplifier having a first amplifier input to receive a first amplifier input signal representing the transmit data, and a first amplifier output to provide a first amplifier output signal at least partially according to the first amplifier input signal, and a second amplifier circuit including a second amplifier having a second amplifier input coupled with the first amplifier output to receive the first amplifier output signal, and a second amplifier output circuit coupled with the first amplifier output, the second amplifier output circuit operative in a first mode to selectively provide a feedforward current output signal to the first amplifier output at least partially according to the first amplifier output signal to increase a voltage swing at the first amplifier output, the feedforward current signal increasing output of the first amplifier above its operating voltage, the second amplifier output circuit operative in a second mode to refrain from providing the feedforward current output signal to the first amplifier output. 2. The PHY network interface IC of claim 1 , wherein the first amplifier output provides the first amplifier output signal as a voltage signal at least partially according to the first amplifier input signal. 3. The PHY network interface IC of claim 1 , wherein the first amplifier circuit comprises: a differential amplifier, including: a first input and a second input to receive a differential first amplifier input signal, and a first output and a second output to provide the first amplifier output signal as a differential voltage; and a second feedback circuit coupled between the second input and the second output of the differential amplifier. 4. The PHY network interface IC of claim 3 , wherein the second amplifier output circuit is operative in the first mode to selectively provide the feedforward current output signal independent of the first and second feedback circuits of the first amplifier circuit. 5. The PHY network interface IC of claim 4 , wherein the second amplifier circuit comprises: the second amplifier with a second amplifier output coupled to provide a second signal to a load resistor at least partially according to the first amplifier output signal, and a feedback circuit coupled between the second amplifier output and the second amplifier input to set a amplifier gain of the second amplifier; and wherein the second amplifier output circuit comprises a current mirror circuit operative in the first mode to provide the feedforward current output signal to the first amplifier output according to the second signal and a feedforward gain value. 6. The PHY network interface IC of claim 5 , wherein the feedforward gain value is greater than 1. 7. The PHY network interface IC of claim 5 , wherein the second amplifier gain value is unity. 8. The PHY network interface IC of claim 5 , further comprising a mode control circuit to provide a control signal to set the mode of the transceiver circuit to the first mode or the second mode, wherein the second amplifier circuit is operative in response to the control signal setting the mode of the transceiver circuit to the second mode to disable the current mirror circuit to prevent the second amplifier output circuit from providing the feedforward current output signal to the first amplifier output. 9. The PHY network interface IC of claim 5 , wherein the second amplifier provides a second current signal to generate a second voltage signal across a load resistor at least partially according to the first amplifier output signal. 10. The PHY network interface IC of claim 4 , wherein a gain value of the second amplifier circuit is unity. 11. The PHY network interface IC of claim 1 , wherein the first amplifier circuit comprises a feedback circuit coupled between the first amplifier input and the first amplifier output; and wherein the second amplifier output circuit is operative in the first mode to selectively provide the feedforward current output signal independent of the feedback circuit of the first amplifier circuit. 12. The PHY network interface IC of claim 11 , wherein the second amplifier circuit comprises: a second amplifier with a second amplifier output coupled to provide a second signal to a load resistor at least partially according to the first amplifier output signal, and a feedback circuit coupled between the second amplifier output and the second amplifier input to set a amplifier gain of the second amplifier; and wherein the second amplifier output circuit comprises a current mirror circuit operative in the first mode to provide the feedforward current output signal to the first amplifier output according to the third signal and a feedforward gain value. 13. The PHY network interface IC of claim 1 , wherein the second amplifier circuit comprises: a second amplifier with a second amplifier output coupled to provide a second signal to a load resistor at least partially according to the first amplifier output signal, and a feedback circuit coupled between the second amplifier output and the second amplifier input to set a amplifier gain of the second amplifier; and wherein the second amplifier output circuit comprises a current mirror circuit operative in the first mode to provide the feedforward current output signal to the first amplifier output according to the second signal and a feedforward gain value. 14. The PHY network interface IC of claim 13 , wherein the second amplifier provides a second current signal to generate a second voltage signal across a load resistor at least partially according to the first amplifier output signal. 15. The PHY network interface IC of claim 1 , wherein the second amplifier is a class AB amplifier. 16. A transmit interface circuit, comprising: a first amplifier circuit with a first input to receive a data input signal, and a first amplifier output to generate a first amplifier output voltage signal according to the data input signal; a first feedback circuit coupled between the first amplifier input and the first amplifier output to set a first amplifier gain of the first amplifier circuit; a transconductance amplifier including a transconductance amplifier input coupled with the first amplifier output to receive the first amplifier output signal, and a transconductance amplifier output to provide a current output signal according to the first amplifier output voltage signal; a load resistor coupled to the transconductance amplifier output to provide a load voltage signal according to the current output signal; a second feedback circuit coupled between the transconductance amplifier output and the transconductance amplifier input to set a gain of the transconductance amplifier; a current mirror circuit, including: a first transistor operative when a control signal is in a first state to conduct a first mirror current according to the load voltage signal, the first transistor operative when the control signal is in a different second state to refrain from conducting current; and a second transistor coupled with the first amplifier output and with the first transistor, the second transisto
Selecting one or more amplifiers from a plurality of amplifiers · CPC title
Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal · CPC title
the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC · CPC title
the amplifier being made for low supply voltages · CPC title
using two SEPP driving stages · CPC title
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