Magnetic core

Patent metadata

Field	Value
Publication number	US-10199573-B2
Application number	US-201715605540-A
Country	US
Kind code	B2
Filing date	May 25, 2017
Priority date	May 26, 2016
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

A method of fabricating a semiconductor device includes aligning an alignment structure of a wafer to a direction of a magnetic field created by an external electromagnet and depositing a magnetic layer (e.g., NiFe) over the wafer in the presence of the magnetic field and while applying the magnetic field and maintaining a temperature of the wafer below 150° C. An insulation layer (e.g., AlN) is deposited on the first magnetic layer. The alignment structure of the wafer is again aligned to the direction of the magnetic field and a second magnetic layer is deposited on the insulation layer, in the presence of the magnetic field and while maintaining the temperature of the wafer below 150° C.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device, comprising:
aligning an alignment structure of a wafer to a direction of a magnetic field created by an external electromagnet;
depositing a first magnetic layer over the wafer in the presence of the magnetic field while maintaining a temperature of the wafer below 150° C.;
depositing an insulation layer on the first magnetic layer;
again aligning the alignment structure of the wafer to the direction of the magnetic field created by the external electromagnet;
depositing a second magnetic layer on the insulation layer, in the presence of the magnetic field while maintaining the temperature of the wafer below 150° C.

2. The method of claim 1 , further comprising:
forming a seed layer over the wafer;
performing a pre-sputter etch of the seed layer, wherein the first magnetic layer is deposited on the seed layer after performing the pre-sputter etch.

3. The method of claim 1 , further comprising repeating the steps of depositing an insulation layer, again aligning the alignment structure, and depositing a second magnetic layer at least once.

4. The method of claim 1 , wherein depositing the insulation layer comprises depositing AlN at room temperature.

5. The method of claim 4 , wherein depositing the insulation layer is performed using a low power of 750 W.

6. The method of claim 1 , wherein the first and second magnetic layers comprise NiFe and have a thickness between 2000 Å and 5000 Å.

7. The method of claim 6 , wherein depositing the first and second magnetic layers is performed using a DC power on the order of 6.4 kW.

8. The method of claim 6 , wherein the first and second magnetic layers have a thickness of 3350 Å.

9. The method of claim 6 , wherein the first and second magnetic layers are deposited using a physical vapor deposition process at a high pressure on the order of 12 mTorr.

10. The method of claim 1 , wherein the aligning and depositing the first and second magnetic layer steps create a first axis and a perpendicular second axis wherein the first axis has different magnetic properties than the second axis.

11. The method of claim 1 , wherein said semiconductor device is an integrated fluxgate sensor.

12. The method of claim 1 , wherein said semiconductor device is a power inductor or a transformer.

13. A method of fabricating an integrated circuit, comprising:
forming a seed layer over a wafer;
transferring the wafer to a first process module of a physical vapor deposition (PVD) tool;
performing a pre-sputter etch of the seed layer in the first process module;
transferring the wafer to a second process module of the PVD tool;
aligning an alignment structure of the wafer relative to a direction of a magnetic field created by an external electromagnet in the second process module;
depositing a first magnetic layer on the seed layer in the second process module after aligning the alignment structure and while applying the magnetic field and maintaining a temperature of the wafer below 150° C.;
transferring the wafer back to the first process module of the PVD tool;
depositing a first insulation layer on the first magnetic layer in the first process module;
transferring the wafer back to the second process module of the PVD tool;
again aligning the alignment structure of the wafer relative to the direction of the magnetic field created by the external electromagnet in the second process module;
depositing a second magnetic layer on the first insulation layer, after again aligning the alignment structure and while applying the magnetic field and maintaining the temperature of the wafer below 150° C.

14. The method of claim 13 , further comprising:
transferring the wafer back to the first process module of the PVD tool;
depositing a second insulation layer on the second magnetic layer in the first process module;
transferring the wafer back to the second process module of the PVD tool;
again aligning the alignment structure of the wafer relative to the direction of the magnetic field created by the external electromagnet in the second process module;
depositing a third magnetic layer on the second insulation layer, after again aligning the alignment structure and while applying the magnetic field and maintaining the temperature of the wafer below 150° C. transferring the wafer back to the first process module of the PVD tool;
depositing a third insulation layer on the third magnetic layer in the first process module;
transferring the wafer back to the second process module of the PVD tool;
again aligning the alignment structure of the wafer relative to the direction of the magnetic field created by the external electromagnet in the second process module;
depositing a fourth magnetic layer on the third insulation layer, after again aligning the alignment structure and while applying the magnetic field and maintaining the temperature of the wafer below 150° C.

15. The method of claim 13 , wherein depositing the first insulation layer comprises depositing AlN at room temperature and using a low power on the order of 750 W.

16. The method of claim 13 , wherein the first and second magnetic layers comprise NiFe and have a thickness between 2000 Å and 5000 Å.

17. The method of claim 13 , wherein depositing the first and second magnetic layers is performed using a DC power on the order of 6.4 kW.

18. The method of claim 17 , wherein the first and second magnetic layers have a thickness of 3350 Å.

19. The method of claim 17 , wherein the first and second magnetic layers are deposited using a physical vapor deposition process at a high pressure on the order of 12 mTorr.

20. The method of claim 13 , wherein aligning the alignment structure and applying the magnetic field during deposition of the first and second magnetic layers create a first axis and a perpendicular second axis wherein the first axis has different magnetic properties than the second axis.

21. A method of fabricating an integrated circuit, comprising:
forming a titanium layer over a wafer;
transferring the wafer to a first process module of a physical vapor deposition (PVD) tool;
performing a pre-sputter etch of the titanium layer in the first process module;
transferring the wafer to a second process module of the PVD tool;
aligning an alignment structure of the wafer to a direction of a magnetic field created by an electromagnet in the second process module;
depositing a first NiFe layer on the titanium layer in the second process module after aligning the alignment structure and while applying the magnetic field and maintaining a temperature of the wafer below 150° C.;
transferring the wafer back to the first process module of the PVD tool;
depositing a first AlN layer on the first NiFe layer in the first process module;
transferring the wafer back to the second process module of the PVD tool;
depositing a second NiFe layer on the first AlN layer, after again aligning the alignment structure of the wafer to the direction of the magnetic field and while applying the magnetic field and maintaining the temperature of the wafer below 150° C.

22. The method of claim 21 , further comprising:
forming an additional titanium layer over the second NiFe layer;
forming an insulating layer over the additional titanium layer.

23. The method of claim 22 , wherein the insulating layer comprises a material selected from aluminum-oxide, silicon-oxide, and silicon nitride.

Assignees

• Texas Instruments Inc

Inventors

• Eissa Mona
• Lee Dok Won
• Shulver Byron
• Zhang Yousong

Classifications

• H01F10/265

  Magnetic multilayers non exchange-coupled (H01F10/32 takes precedence) · CPC title

• H01F41/046

  structurally combined with ferromagnetic material · CPC title

• H01L43/02

  Electricity · mapped topic

• H01L27/22

  Electricity · mapped topic

• H01L43/12 Primary

  Electricity · mapped topic