Multilayer substrate

US10199358B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10199358-B2
Application numberUS-201615543397-A
CountryUS
Kind codeB2
Filing dateJan 13, 2016
Priority dateJan 13, 2015
Publication dateFeb 5, 2019
Grant dateFeb 5, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Provided is a multilayer substrate obtained by laminating semiconductor substrates each having a trough electrode. The multilayer substrate has excellent conduction characteristics and can be manufactured at low cost. Conductive particles are each selectively present at a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate. The multilayer substrate has a connection structure in which the facing through electrodes are connected by the conductive particles, and the semiconductor substrates each having the through electrode are bonded by an insulating adhesive.

First claim

Opening claim text (preview).

The invention claimed is: 1. A multilayer substrate comprising semiconductor substrates which each have a through electrode and are laminated to each other, wherein conductive particles are each selectively present at least at a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate, a conductive particle unit including three or more adjacent conductive particles is formed in a two-dimensional array in the plan view, the multilayer substrate has a connection structure in which the through electrodes are connected by the conductive particle unit, and the semiconductor substrates are bonded together by an insulating adhesive. 2. The multilayer substrate according to claim 1 , wherein the semiconductor substrates include a first semiconductor substrate having a through electrode and a second semiconductor substrate having a through electrode, the first and second semiconductor substrates are laminated together, and the multilayer substrate has a connection structure in which the through electrode of the first semiconductor substrate and the through electrode of the second semiconductor substrate are connected by the conductive particle unit which is selectively disposed between the through electrodes. 3. The multilayer substrate according to claim 2 , further comprising: a third semiconductor substrate having a through electrode laminated on the second semiconductor substrate, and having a connection structure in which the through electrode of the second semiconductor substrate and the through electrode of the third semiconductor substrate face each other, and are connected by conductive particles which are selectively disposed between the through electrodes, and the second and third semiconductor substrates are bonded by insulating adhesive. 4. The multilayer substrate according to claim 1 , wherein a number of conductive particles which are not captured by the facing through electrodes between the first and second semiconductor substrates is 5% or less relative to a total number of the conductive particles present between the first and second semiconductor substrates. 5. The multilayer substrate according to claim 1 , further comprising: a heat sink in an outermost layer of the multilayer substrate that is connected to the through electrodes. 6. A method for manufacturing the multilayer substrate according to claim 1 , comprising: putting between the semiconductor substrates an anisotropic conductive film in which the conductive particles are selectively disposed in the insulating adhesive layer so as to each correspond to the position where the through electrodes face each other as viewed in the plan view of the multilayer substrate; and pressurizing the anisotropic conductive film under heating to achieve anisotropic conductive connection of the semiconductor substrates. 7. The method according to claim 6 , wherein the semiconductor substrates include a first semiconductor substrate and a second semiconductor substrate. 8. The method according to claim 7 , wherein a third semiconductor substrate having a through electrode is laminated on the second semiconductor substrate, and an anisotropic conductive film in which conductive particles are selectively disposed in an insulating adhesive layer so as to correspond to an arrangement of the through electrodes is put between the through electrode of the second semiconductor substrate and the through electrode of the third semiconductor substrate, and pressurized under heating, to achieve anisotropic conductive connection between the second and third semiconductor substrates. 9. The multilayer substrate according to claim 1 , further comprising an anisotropic conductive film comprising the insulating adhesive layer and the conductive particles disposed in the insulating adhesive layer, wherein the conductive particles are selectively disposed at least in the insulating adhesive layer so as to correspond to an arrangement of through electrodes connected by the anisotropic conductive film. 10. The multilayer substrate according to claim 1 , wherein the conductive particles are disposed in the insulating adhesive layer. 11. The multilayer substrate according to claim 1 , wherein the conductive particle unit is disposed so as to correspond to an arrangement of the through electrodes. 12. The multilayer substrate according to claim 1 , wherein the conductive particles are metal-coated resin particles.

Assignees

Inventors

Classifications

  • Subject matter not provided for in other groups of this subclass · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10199358B2 cover?
Provided is a multilayer substrate obtained by laminating semiconductor substrates each having a trough electrode. The multilayer substrate has excellent conduction characteristics and can be manufactured at low cost. Conductive particles are each selectively present at a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate. The multilayer s…
Who is the assignee on this patent?
Dexerials Corp
What technology area does this patent fall under?
Primary CPC classification H10W72/013. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).