Counter-flow expanding channels for enhanced two-phase heat removal
US-2017179001-A1 · Jun 22, 2017 · US
US10199309B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10199309-B2 |
| Application number | US-201715798527-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 31, 2017 |
| Priority date | Dec 21, 2015 |
| Publication date | Feb 5, 2019 |
| Grant date | Feb 5, 2019 |
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A method of forming metallic pillars between a fluid inlet and outlet for two-phase fluid cooling. The method may include; forming an arrangement of metallic pillars between two structures, the metallic pillars are electrically connected to metallic connecting lines that run through each of the two structures, the arrangement of metallic pillars located between a fluid inlet and a fluid channel, the fluid channel having channel walls running between arrangements of the metallic pillars and a fluid outlet, whereby a fluid passes through the arrangement of metallic pillars to flow into the fluid channel.
Opening claim text (preview).
What is claimed is: 1. A two-phase method for cooling semiconductor structures in a chip stack comprising: forming metallic pillars between a first semiconductor structure and a second semiconductor structure, the metallic pillars located in a fluid channel, the fluid channel separating the first semiconductor structure and the second semiconductor structure, and a coolant flowing into the fluid channel from an inlet port and exiting from and outlet port, wherein the metallic pillars transfer heat from the first semiconductor structure and the second semiconductor structure to the coolant, provide an electrical connection between the first semiconductor structure and the second semiconductor structure, and provide structural support for the first semiconductor structure and the second semiconductor structure, wherein the metallic pillars are arranged in a staggered arrangement between adjacent fluid channel walls. 2. The method of claim 1 , wherein the coolant enters the fluid channel from a first outer perimeter side of the first semiconductor structure and the second semiconductor structure and exits the fluid channel at a second outer perimeter side of the first semiconductor structure and the second semiconductor structure. 3. The method of claim 1 , wherein the metallic pillars are arranged in an inline arrangement between adjacent fluid channel walls.
between stacked chips · CPC title
characterised by arrangements for thermal management of the stacked chips · CPC title
Package configurations · CPC title
Containers or parts thereof · CPC title
for cooling by change of state · CPC title
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