Distribution and stabilization of fluid flow for interlayer chip cooling

US10199309B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10199309-B2
Application numberUS-201715798527-A
CountryUS
Kind codeB2
Filing dateOct 31, 2017
Priority dateDec 21, 2015
Publication dateFeb 5, 2019
Grant dateFeb 5, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method of forming metallic pillars between a fluid inlet and outlet for two-phase fluid cooling. The method may include; forming an arrangement of metallic pillars between two structures, the metallic pillars are electrically connected to metallic connecting lines that run through each of the two structures, the arrangement of metallic pillars located between a fluid inlet and a fluid channel, the fluid channel having channel walls running between arrangements of the metallic pillars and a fluid outlet, whereby a fluid passes through the arrangement of metallic pillars to flow into the fluid channel.

First claim

Opening claim text (preview).

What is claimed is: 1. A two-phase method for cooling semiconductor structures in a chip stack comprising: forming metallic pillars between a first semiconductor structure and a second semiconductor structure, the metallic pillars located in a fluid channel, the fluid channel separating the first semiconductor structure and the second semiconductor structure, and a coolant flowing into the fluid channel from an inlet port and exiting from and outlet port, wherein the metallic pillars transfer heat from the first semiconductor structure and the second semiconductor structure to the coolant, provide an electrical connection between the first semiconductor structure and the second semiconductor structure, and provide structural support for the first semiconductor structure and the second semiconductor structure, wherein the metallic pillars are arranged in a staggered arrangement between adjacent fluid channel walls. 2. The method of claim 1 , wherein the coolant enters the fluid channel from a first outer perimeter side of the first semiconductor structure and the second semiconductor structure and exits the fluid channel at a second outer perimeter side of the first semiconductor structure and the second semiconductor structure. 3. The method of claim 1 , wherein the metallic pillars are arranged in an inline arrangement between adjacent fluid channel walls.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • characterised by arrangements for thermal management of the stacked chips · CPC title

  • Package configurations · CPC title

  • Containers or parts thereof · CPC title

  • for cooling by change of state · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10199309B2 cover?
A method of forming metallic pillars between a fluid inlet and outlet for two-phase fluid cooling. The method may include; forming an arrangement of metallic pillars between two structures, the metallic pillars are electrically connected to metallic connecting lines that run through each of the two structures, the arrangement of metallic pillars located between a fluid inlet and a fluid channel…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W40/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 05 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).