Methods and systems for limiting data traffic while processing computer system operations
US-2024168645-A1 · May 23, 2024 · US
US10198305B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10198305-B2 |
| Application number | US-201514834646-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 25, 2015 |
| Priority date | Mar 5, 2012 |
| Publication date | Feb 5, 2019 |
| Grant date | Feb 5, 2019 |
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Methods, apparatuses, and computer program products for managing a storage device using a hybrid controller are provided where the storage device comprises an internal peripheral component interconnect express (PCIe) interface to control solid state memory within the storage device. In particular embodiments, the storage device includes a first external interface configured to establish an external PCIe link and a second external interface configured to establish at least one of an external serial attached small computer system interface (SAS) link and an external serial advanced technology attachment (SATA) link. Embodiments include receiving from an external source, by the hybrid controller, a first command at the first external interface and a second command at the second external interface; and concurrently implementing, by the hybrid controller, the first command using a PCIe protocol and the second command using one of a SAS protocol and a SATA protocol.
Opening claim text (preview).
What is claimed is: 1. A method comprising: by computer program instructions on a hybrid controller of a storage device, receiving from an external source, a first command at a first external interface; receiving from the external source, a second command at a second external interface; and concurrently implementing the first command using a peripheral component interconnect express (PCIe) protocol and the second command using one of a SAS protocol and a SATA protocol; detecting a failure of an external PCIe link between the first external interface and the external source; in response to detecting the failure of the external PCIe link, utilizing the second external interface to communicate with the external source over one of an external SAS link and an external SATA link; switching from a PCIe mode to one of a SAS mode and a SATA mode; and in response to switching to one of the SAS mode and the SATA mode, receiving via the second external interface, an input/output (I/O) command from the external source. 2. The method of claim 1 , wherein: the first command comprises a PCIe I/O command; and the second command comprises a management command to access management data registers in the hybrid controller, the management data registers storing management data corresponding to the solid state memory. 3. The method of claim 1 wherein utilizing the second external interface to communicate with the external source over one of an external SAS link and an external SATA link includes transmitting via the second external interface, a message to the external source, the message indicating a failure of the external PCIe link. 4. The method of claim 1 further comprising: suspending, by the hybrid controller, processing at the first external interface; and flushing, by the hybrid controller, any pending commands received from the first external interface. 5. An apparatus comprising an internal peripheral component interconnect express (PCIe) interface to control solid state memory within a storage device, the storage device including a hybrid controller, a first external interface and a second external interface, the first external interface configured to establish an external PCIe link, the second external interface configured to establish at least one of an external serial attached small computer system interface (SAS) link and an external serial advanced technology attachment (SATA) link, the hybrid controller comprising a computer processor and a computer memory operatively coupled to the computer processor, the hybrid controller configured to: receiving from an external source, a first command at a first external interface; receiving from the external source, a second command at a second external interface; and concurrently implementing the first command using a peripheral component interconnect express (PCIe) protocol and the second command using one of a SAS protocol and a SATA protocol; detecting a failure of an external PCIe link between a first external interface and an external source; in response to detecting the failure of the external PCIe link, utilizing a second external interface to communicate with the external source over one of an external SAS link and an external SATA link; switching from a PCIe mode to one of a SAS mode and a SATA mode; and in response to switching to one of the SAS mode and the SATA mode, receiving via the second external interface, an input/output (I/O) command from the external source. 6. The apparatus of claim 5 , wherein: the first command comprises a PCIe I/O command; and the second command comprises a management command to access management data registers in the hybrid controller, the management data registers storing management data corresponding to the solid state memory. 7. The apparatus of claim 5 wherein utilizing the second external interface to communicate with the external source over one of an external SAS link and an external SATA link includes transmitting via the second external interface, a message to the external source, the message indicating a failure of the external PCIe link. 8. The apparatus of claim 5 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of: suspending, by the hybrid controller, processing at the first external interface; flushing, by the hybrid controller, any pending commands received from the first external interface. 9. A computer program product comprising a non-transitory computer readable medium, the computer readable medium including computer program instructions that when executed by a hybrid controller of a storage device cause the hybrid controller to carry out the steps of: receiving from an external source, a first command at a first external interface; receiving from the external source, a second command at a second external interface; and concurrently implementing the first command using a peripheral component interconnect express (PCIe) protocol and the second command using one of a SAS protocol and a SATA protocol; detecting a failure of an external PCIe link between a first external interface and an external source; in response to detecting the failure of the external PCIe link, utilizing a second external interface to communicate with the external source over one of an external SAS link and an external SATA link; switching from a PCIe mode to one of a SAS mode and a SATA mode; and in response to switching to one of the SAS mode and the SATA mode, receiving via the second external interface, an input/output (I/O) command from the external source. 10. The computer program product of claim 9 , wherein: the first command comprises a PCIe I/O command; and the second command comprises a management command to access management data registers in the hybrid controller, the management data registers storing management data corresponding to the solid state memory. 11. The computer program product of claim 9 wherein utilizing the second external interface to communicate with the external source over one of an external SAS link and an external SATA link includes transmitting via the second external interface, a message to the external source, the message indicating a failure of the external PCIe link. 12. The computer program product of claim 9 further comprising computer program instructions that, when executed, cause a computer to carry out the steps of: suspending, by the hybrid controller, processing at the first external interface; flushing, by the hybrid controller, any pending commands received from the first external interface. 13. The computer program product of claim 9 wherein the computer readable medium comprises a storage medium.
in relation to data integrity, e.g. data losses, bit errors · CPC title
being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title
by reconfiguration of paths · CPC title
by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device · CPC title
Hybrid storage device · CPC title
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