Memory system capable of controlling operation performance according to temperature and method of operating the same

Patent metadata

Field	Value
Publication number	US-10198214-B2
Application number	US-201514601552-A
Country	US
Kind code	B2
Filing date	Jan 21, 2015
Priority date	Apr 17, 2014
Publication date	Feb 5, 2019
Grant date	Feb 5, 2019

Abstract

A method of operating a memory system, which includes a memory controller and at least one non-volatile memory, includes storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, setting an operation performance level of the memory system to a first performance level, operating the memory controller and the at least one non-volatile memory device according to the first performance level, detecting an internal temperature of the memory system, and changing the operation performance level of the memory system to a second performance level that is different from the first performance level. The operation performance level is changed by the memory controller of the memory system, and changing the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature.

First claim

What is claimed is:

1. A method of operating a memory system, which includes a memory controller and at least one non-volatile memory device, the method comprising:
storing, in the memory system, temperature-dependent performance level information received from a host disposed external to the memory system, wherein, upon initial operation of the memory system, the temperature-dependent performance level information is transmitted from the host to the memory system in a form of a table and set in a volatile memory in the memory controller;
setting an operation performance level of the memory system to a first performance level;
operating the memory controller and the at least one non-volatile memory device according to the first performance level;
detecting an internal temperature of the memory system; and
changing the operation performance level of the memory system to a second performance level that is different from the first performance level,
wherein the operation performance level is changed by the memory controller of the memory system, and the changing of the operation performance level is based on the temperature-dependent performance level information and the detected internal temperature,
wherein the temperature-dependent performance level information included in the table comprises at least a first entry, a second entry, and a third entry, and each of the first, second and third entries comprises a temperature range, a performance level, and a predetermined amount of time,
wherein, when the detected internal temperature remains within the temperature range of the first entry for the predetermined amount of time of the first entry, the operation performance level of the memory system is set to the performance level of the first entry,
wherein, when the detected internal temperature remains within the temperature range of the second entry for the predetermined amount of time of the second entry, the operation performance level of the memory system is set to the performance level of the second entry,
wherein, when the detected internal temperature remains within the temperature range of the third entry for the predetermined amount of time of the third entry, the operation performance level of the memory system is et to the performance level of the third entry.

2. The method of claim 1 , wherein the temperature-dependent performance level information is received from the host during a boot-up operation of the memory system or a run-time operation of the memory system.

3. The method of claim 1 , further comprising:
storing a detected temperature value as current temperature information; and
updating current performance level information with performance level information corresponding to the detected temperature value.

4. The method of claim 1 , wherein a frequency of an internal clock of the memory system is changed based on the temperature-dependent performance level information.

5. The method of claim 1 , wherein a delay of a first confirm command corresponding to a first command received from the host is changed based on the temperature-dependent performance level information.

6. The method of claim 1 , wherein
the memory system comprises a plurality of memory chips, and
a number of memory chips to be simultaneously accessed from among the plurality of memory chips is changed based on the temperature-dependent performance level information.

7. The method of claim 1 , further comprising:
transmitting current performance level information in response to a request from the host;
receiving performance setting information from the host; and
performing a memory operation at a set performance level based on the performance setting information without using the temperature-dependent performance level information stored in the memory system.

8. The method of claim 1 , wherein the memory system comprises a solid state drive (SSD) or a memory card.

9. A method of operating a memory system, which includes a memory controller and at least one non-volatile memory device, the method comprising:
transmitting first information relating to a temperature of the memory system to a host in response to receiving a first command from the host at the memory system, wherein the first information includes an internal temperature of the memory system, and the first command is a read command or a write command;
receiving first performance level information associated with the first information from the host, and storing the first performance level information in the memory system;
performing a first operation of the memory system at a first performance level corresponding to the first performance level information;
transmitting second information relating to the temperature of the memory system in response to receiving the first command at the memory system;
receiving and storing second performance level information associated with the second information in the memory system; and
performing a second operation of the memory system at a second performance level corresponding to the second performance level information,
wherein the first performance level information comprises first time information indicating a predetermined amount of time at which the memory system is to operate within a specified temperature range corresponding to the first performance level before changing to the first performance level, and the second performance level information comprises second time information indicating a predetermined amount of time at which the memory system is to operate within a specified temperature range corresponding to the second performance level before changing to the second performance level,
wherein information relating to the temperature stored in a current state storage unit is updated from the first information to the second information in the memory system, and information relating to the performance stored in the current state storage unit is updated from the first performance level information to the second performance level information in the memory system.

10. The method of claim 9 , wherein the first command is prearranged between the memory system and a host.

11. The method of claim 9 , wherein a delay in transmitting a confirm command from the memory system to the host is changed according to the first performance level and the second performance level.

12. The method of claim 9 , further comprising:
updating the first information in a memory based on the second information according to a change in temperature; and
updating the first performance level information in the memory based on the second performance level information according to the change in temperature.

13. A method of operating a memory system, which includes a memory controller and at least one non-volatile memory device, the method comprising:
receiving, at the memory system, temperature-dependent performance level information from a host disposed external to the memory system, wherein, upon initial operation of the memory system, the temperature-dependent performance level information is transmitted from the host to the memory system in a form of a table and set in a volatile memory in the memory controller;
setting an operation performance level of the memory system to a first performance level;
operating the memory controller and the at least one non-volatile memory device according to the first performance level;
detecting an internal temperature of the memory system; and
throttling the operation performance level of the memory system to a second performance level that is lower than the first performance level based on the temperature-dependent performance l

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Hyun-Seok
• Kim Dae-Ho
• Oh Yong-Geun
• Moon Sung-Jin

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0616

  in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title

• G06F11/3058

  Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206) · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0653 Primary

  Monitoring storage devices or systems · CPC title