Partial spacers for wafer-level fabricated modules

Patent metadata

Field	Value
Publication number	US-10193026-B2
Application number	US-201415027637-A
Country	US
Kind code	B2
Filing date	Oct 1, 2014
Priority date	Oct 8, 2013
Publication date	Jan 29, 2019
Grant date	Jan 29, 2019

Abstract

An optoelectronic module includes a cover substrate including a passive optical element, a base substrate including an optoelectronic device, and a spacer layer joining the cover substrate to the base substrate. The spacer layer includes multiple first spacer elements fixed to a surface of the cover substrate and multiple second spacer elements fixed to a surface of the base substrate, in which each first spacer element is joined to a corresponding second spacer element through an adhesive layer, and in which the cover substrate, base substrate, and spacer layer define an interior region of the module in which the optical element is aligned with the optoelectronic device.

First claim

What is claimed is:

1. A wafer-level method of fabricating a plurality of optoelectronic device modules, the method comprising:
providing a cover substrate that includes transparent regions, the cover substrate having a respective passive optical element on each transparent region;
providing a plurality of first spacer elements on a surface of the cover substrate, wherein adjacent passive optical elements are separated from one another by a respective first spacer element;
providing a base substrate including a surface on which are mounted a plurality of optoelectronic devices;
providing a plurality of second spacer elements on the surface of the base substrate, wherein adjacent optoelectronic devices are separated from one another by a respective second spacer element;
joining each first spacer element on the cover substrate directly to a corresponding one of the second spacer elements on the base substrate to form a wafer stack, each of the first spacer elements being fixed to a corresponding one of the second spacer elements by adhesive, such that each passive optical element is aligned with a corresponding one of the optoelectronic devices;
degassing volatile organic compounds through the adhesive; and
separating the wafer stack into a plurality of optoelectronic device modules, wherein each optoelectronic device module includes at least one of the passive optical elements and at least one of the optoelectronic devices.

2. The wafer-level method of claim 1 , wherein each passive optical element comprises a lens, a mirror, or a diffuser, and wherein each optoelectronic device comprises a light emitting element or a light sensing element.

3. The wafer-level method of claim 1 ,
wherein providing the plurality of first spacer elements comprises attaching a first spacer wafer to the cover substrate to provide the first spacer elements on the cover substrate; and
wherein providing the plurality of second spacer elements comprises attaching a second spacer wafer to the base substrate to provide the second spacer elements on the base substrate.

4. The wafer-level method of claim 1 ,
wherein providing the plurality of first spacer elements comprises forming the first spacer elements on the cover substrate by using a vacuum injection technique; and
wherein providing the plurality of second spacer elements comprises forming the second spacer elements on the base substrate by using a vacuum injection technique.

5. The wafer-level method of claim 1 , further comprising forming the passive optical elements on the transparent regions by a replication technique; and
wherein joining each of the first spacer elements on the cover substrate to a corresponding second spacer element on the base substrate comprises applying an adhesive to a free end of the first spacer element and/or a free end of the corresponding second spacer element.

6. The wafer-level method of claim 5 , wherein applying the adhesive comprises:
applying a layer of polydimethylsiloxane (PDMS) to the free end of each first spacer element and/or to the free end of each second spacer element; and
curing the layer of PDMS to bond the first spacer element to the corresponding second spacer element.

7. The wafer-level method of claim 5 , wherein applying the adhesive comprises:
applying a layer of ultraviolet (UV) curable epoxy or heat curable epoxy to the free end of each first spacer element and/or to the free end of each second spacer element; and
curing the layer of UV curable epoxy or heat curable epoxy to bond the first spacer element to the corresponding second spacer element.

8. The wafer-level method of claim 6 , wherein degassing volatile organic compounds through the adhesive occurs prior to curing the PDMS layer.

9. The wafer-level method of claim 1 wherein degassing volatile organic compounds through the adhesive includes placing the wafer stack in a low pressure environment.

Assignees

• Heptagon Micro Optics Pte Ltd

Inventors

• Rudmann Hartmut
• Westenhöfer Susanne
• Gubser Simon

Classifications

• H01S5/183

  having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] · CPC title

• B29D11/00307

  Producing lens wafers · CPC title

• H01S5/02

  Structural details or components not essential to laser action · CPC title

• H01L51/5275

  Electricity · mapped topic

• H01L51/5225

  Electricity · mapped topic