III-N based substrate for power electronic devices and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-10192959-B2
Application number	US-201715817343-A
Country	US
Kind code	B2
Filing date	Nov 20, 2017
Priority date	Jan 23, 2017
Publication date	Jan 29, 2019
Grant date	Jan 29, 2019

Abstract

The present disclosure relates to a III-N based substrate for power electronic devices, comprising a base substrate, a III-N laminate above the base substrate and a buffer layer structure between the base substrate and the III-N laminate. The buffer layer structure comprises at least a first superlattice laminate and a second superlattice laminate above the first superlattice laminate. The first superlattice laminate comprises a repetition of a first superlattice unit which consists of a plurality of first AlGaN layers. The second superlattice laminate comprises a repetition of a second superlattice unit which consists of a plurality of second AlGaN layers. An average aluminum content of the first superlattice laminate is a predetermined difference greater than an average aluminum content of the second superlattice laminate, to improve the vertical breakdown voltage. The present disclosure also relates to a method for manufacturing a III-N based substrate for power electronic devices.

First claim

What is claimed is:

1. A III-N based substrate for power electronic devices comprising:
a base substrate;
a III-N laminate above the base substrate; and
a buffer layer structure between the base substrate and the III-N laminate,
wherein the buffer layer structure comprises at least a first superlattice laminate and a second superlattice laminate above the first superlattice laminate,
wherein the first superlattice laminate comprises a repetition of a first superlattice unit which comprises a plurality of first AlGaN layers, each of which is made of Al x Ga 1-x N with 0≤x≤1 and x being different among the first AlGaN layers,
wherein the second superlattice laminate comprises a repetition of a second superlattice unit which comprises a plurality of second AlGaN layers, each of which is made of Al y Ga 1-y N with 0≤y≤1 and y being different among the second AlGaN layers,
wherein an average aluminum content of the first superlattice laminate is greater than an average aluminum content of the second superlattice laminate by a predetermined difference, and
wherein the buffer layer structure has a breakdown field strength of more than 150 V/μm in forward or reverse vertical bias at room temperature (25° C.).

2. The III-N based substrate according to claim 1 , wherein the base substrate comprises SiC.

3. The III-N based substrate according to claim 1 , wherein the predetermined difference controls substrate warpage at room temperature (25° C.) to be below 50 μm for a substrate of 200 mm in diameter.

4. The III-N based substrate according to claim 1 , wherein an at least partial strain relaxation is present in the buffer layer structure, between at least one adjacent pair of layers of the first superlattice laminate or the second superlattice laminate.

5. The III-N based substrate according to claim 1 , wherein the average aluminum content of the first superlattice laminate is at least 30%.

6. The III-N based substrate according to claim 1 , wherein the average aluminum content of the second superlattice laminate is below 25%.

7. The III-N based substrate according to claim 1 , wherein the predetermined difference is at least 5%.

8. The III-N based substrate according to claim 1 ,
wherein the buffer layer structure comprises at least one additional superlattice laminate on top of the second superlattice laminate,
wherein each additional superlattice laminate comprises a repetition of a respective third superlattice unit which comprises a plurality of respective third AlGaN layers, each of which is made of Al i Ga 1-i N with 0≤i≤1 and i being different among the respective third AlGaN layers of the respective third superlattice unit,
wherein the average aluminum content of the first superlattice laminate is at least 5% greater than the average aluminum content of the second superlattice laminate, and
wherein the average aluminum content of the second superlattice laminate is at least 5% greater than an average aluminum content of the at least one additional superlattice laminate.

9. The III-N based substrate according to claim 8 , wherein the average aluminum content of the at least one additional superlattice laminate is at least 5%.

10. The III-N based substrate according to claim 8 , wherein the first superlattice unit, the second superlattice unit, or an additional superlattice unit comprises at least three AlGaN layers.

11. The III-N based substrate according to claim 10 , wherein the first superlattice unit, the second superlattice unit, or a third superlattice unit comprises a layer of Al j Ga 1-j N, with 0≤j≤0.5.

12. The III-N based substrate according to claim 8 , wherein the first superlattice unit, the second superlattice unit or an additional superlattice unit comprises a layer of AlN.

13. The III-N based substrate according to claim 8 , wherein one or more layers selected from the first superlattice laminate, the second superlattice laminate, or one of the at least one additional superlattice laminates comprises impurity atoms.

14. The III-N based substrate according to claim 13 , wherein the impurity atoms are one or more species selected from the group consisting of C atoms, Fe atoms, Mn atoms, Mg atoms, V atoms, Cr atoms, Be atoms, and B atoms.

15. The III-N based substrate according to claim 14 , wherein the impurity atoms are C atoms or Fe atoms.

16. A method for manufacturing a III-N based substrate for power electronic devices, comprising the steps of:
providing a base substrate;
growing a buffer layer structure on the base substrate; and
growing a III-N laminate on the buffer layer structure,
wherein the buffer layer structure comprises at least a first superlattice laminate and a second superlattice laminate above the first superlattice laminate,
wherein the first superlattice laminate comprises a repetition of a first superlattice unit which comprises a plurality of first AlGaN layers, each of which is made of Al x Ga 1-x N with 0≤x≤1 and x being different among the first AlGaN layers,
wherein the second superlattice laminate comprises a repetition of a second superlattice unit which consists of a plurality of second AlGaN layers, each of which is made of Al y Ga 1-y N with 0≤y≤1 and y being different among the second AlGaN layers
wherein upon growing the buffer layer structure, process conditions are controlled such that an average aluminum content of the first superlattice laminate is greater than an average aluminum content of the second superlattice laminate by a predetermined difference, and
wherein the buffer layer structure has a breakdown field strength of more than 150 V/μm in forward or reverse vertical bias at room temperature (25° C.).

17. The method according to claim 16 , wherein the first superlattice unit and the second superlattice unit have the same layer structure except for a variation in a respective thickness of at least one of the AlGaN layers to influence the average aluminum content of the superlattice units and hence the superlattice laminates.

18. The method according to claim 16 , wherein for at least one superlattice laminate, growth of superlattice units is at least continued until a slope of an in situ wafer curvature drops below 0.015 km −1 /s.

19. The method according to claim 16 , wherein the buffer layer structure is grown such that an at least partial strain relaxation occurs between at least one adjacent pair of layers of the first superlattice laminate or the second superlattice laminate.

20. The method according to claim 16 , wherein the base substrate comprises SiC.

Assignees

• Imec Vzw

Inventors

• Zhao Ming

Classifications

• H10P14/2921

  being crystalline insulating materials · CPC title

• H10P14/2905

  Silicon, silicon germanium or germanium · CPC title

• H10P14/2904

  Silicon carbide · CPC title

• H10P14/3416

  Nitrides · CPC title

• H10P14/3252

  Alternating layers, e.g. superlattice · CPC title