Semiconductor device and method of manufacturing the same

US10192928B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10192928-B2
Application numberUS-201715706598-A
CountryUS
Kind codeB2
Filing dateSep 15, 2017
Priority dateMar 1, 2016
Publication dateJan 29, 2019
Grant dateJan 29, 2019

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film; a first conductive body contacting the stacked body to extend in a stacking direction; and a plurality of first insulating films in the same layers as the first conductive films and disposed between the first conductive body and the first conductive films, the first conductive body including a projecting part that projects along tops of one of the first insulating films and one of the first conductive films, and a side surface of the projecting part contacting an upper surface of the one of the first conductive films.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a stacked body including a first conductive film and a second conductive film stacked in a first direction via an inter-layer insulating film, the first conductive film being longer than the second conductive film in a second direction, the second direction intersecting the first direction; a first conductive body and a second conductive body, each of the conductive bodies facing the stacked body to extend in the first direction, the first conductive body contacting the first conductive film, and the second conductive body contacting the second conductive film; a first insulating film disposed in the same layer as the first conductive film and disposed between the first conductive body and the first conductive film; a second insulating film disposed in the same layer as the second conductive film and disposed between the second conductive body and the second conductive film, the first conductive body including a first projecting part that projects along upper surfaces of the first insulating film and the first conductive film, and a lower surface of the first projecting part contacting the upper surface of the first conductive film; the second conductive body including a second projecting part that projects along upper surfaces of the second insulating film and the second conductive film, and a lower surface of the second projecting part contacting the upper surface of the second conductive film; a third insulating film configured from a material different from that of the first insulating film and the second insulating film, disposed on the first conductive film and disposed in the same layer as the first projecting part of the first conductive body; and a fourth insulating film configured from a material different from that of the first insulating film and the second insulating film, disposed on the second conductive film and disposed in the same layer as the second projecting part of the second conductive body. 2. The semiconductor device according to claim 1 , further comprising: a fifth insulating film configured from the same material as the first insulating film, and disposed above the third insulating film and the first projecting part. 3. The semiconductor device according to claim 1 , further comprising: a third conductive film extending in the first direction; and a plurality of memory cells disposed at intersections of the first conductive film, the second conductive film and the third conductive film. 4. The semiconductor device according to claim 1 , wherein the second conductive body contacts the second conductive film disposed in an uppermost layer at a certain position of the stacked body when viewed from the first direction. 5. The semiconductor device according to claim 1 , further comprising: a third conductive body disposed between a semiconductor substrate and the first conductive film, wherein the first conductive body contacts an upper surface of the third conductive body at a bottom surface of the first conductive body. 6. The semiconductor device according to claim 1 , wherein the first conductive body and the second conductive body have bottom surfaces in the same position in the first direction. 7. The semiconductor device according to claim 1 , wherein the first conductive body has the first projecting part on both side surfaces facing in the second direction. 8. The semiconductor device according to claim 1 , wherein the first conductive body has the first projecting part only on one of side surfaces facing in the second direction. 9. The semiconductor device according to claim 1 , wherein the first projecting part of the first conductive body contacts an upper surface of the first insulating film at a lower surface of the first projecting part facing in the first direction.

Assignees

Inventors

Classifications

  • of insulating materials · CPC title

  • Etching of wafers, substrates or parts of devices · CPC title

  • Insulating materials thereof · CPC title

  • Vias, e.g. via plugs · CPC title

  • using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

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Frequently asked questions

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What does patent US10192928B2 cover?
A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film; a first conductive body contacting the stacked body to extend in a stacking direction; and a plurality of first insulating films in the same layers as the first conductive films and disposed between the first conductive body and t…
Who is the assignee on this patent?
Toshiba Memory Corp
What technology area does this patent fall under?
Primary CPC classification H10W20/083. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 29 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).