Switching converter with ramp-based output regulation

Patent metadata

Field	Value
Publication number	US-10186967-B2
Application number	US-201615195991-A
Country	US
Kind code	B2
Filing date	Jun 28, 2016
Priority date	Jun 28, 2016
Publication date	Jan 22, 2019
Grant date	Jan 22, 2019

Abstract

A switching converter comprising a regulation circuit adapted to regulate an output value of the converter based on a ramp signal is provided. A feedback circuit adapted to control at least one of a delay and a slope of the ramp signal based on a parameter of the ramp signal is also provided. A method of regulating an output value of a switching converter is also presented.

First claim

What is claimed is:

1. A switching converter comprising
a regulation circuit adapted to regulate an output value of the converter based on a ramp signal;
a feedback circuit adapted to adjust a delay of the ramp signal based on a parameter of the ramp signal; and
a ramp generator, the ramp generator comprising a delay circuit comprising a current generator coupled to a delay capacitor;
wherein the feedback circuit comprises a controller adapted to output a tunable current based on the parameter of the ramp signal; the controller comprising a comparator adapted to compare the parameter associated with the ramp signal with a constant reference value and to output the tunable current based on the comparison;
and wherein the delay circuit is adapted to receive the tunable current such that upon injection the tunable current changes a time required for charging the delay capacitor up to a voltage reference value.

2. The switching converter as claimed in claim 1 , wherein the parameter of the ramp signal comprises an amplitude of the ramp signal.

3. The switching converter as claimed in claim 1 , wherein the parameter of the ramp signal comprises a time duration during which the ramp signal is turned on.

4. The switching converter as claimed in claim 1 , wherein the ramp generator comprises a capacitor circuit coupled to another comparator; wherein said another comparator is adapted to compare an output of the delay circuit with the voltage reference value; and wherein the capacitor circuit is adapted to receive an output of said another comparator.

5. The switching converter as claimed in claim 1 , wherein the comparator comprises at least one of an operational amplifier and a digital subtractor coupled to a digital to analog converter.

6. The switching converter as claimed in claim 1 , wherein the controller comprises a first circuit adapted to detect a time duration during which the ramp signal is turned on.

7. The switching converter as claimed in claim 6 , wherein the first circuit comprises a current generator coupled to a capacitor and a switch connected in parallel with the capacitor; wherein the switch is adapted to receive a control signal.

8. The switching converter as claimed in claim 6 , wherein the first circuit comprises a counter.

9. The switching converter as claimed in claim 1 , wherein the controller comprises a second circuit adapted to detect an amplitude of the ramp signal.

10. The switching converter as claimed in claim 9 , wherein the second circuit comprises at least one of a sample-and-hold circuit and a low-pass filter.

11. A method of regulating an output value of a switching converter comprising
generating a ramp signal with a ramp generator to regulate an output of the converter;
detecting a parameter associated with the ramp signal;
providing a feedback circuit coupled to the ramp generator, wherein the feedback circuit comprises a controller adapted to output a tunable current based on the parameter of the ramp signal; and
adjusting a delay of the ramp signal based on the parameter by comparing the parameter associated with the ramp signal with a constant reference value and generating the tunable current based on the comparison;

wherein the ramp generator comprising a delay circuit comprising a current generator coupled to a delay capacitor; and wherein the delay circuit is adapted to receive the tunable current such that upon injection the tunable current changes a time required for charging the delay capacitor up to a voltage reference value.

12. The method as claimed in claim 11 , wherein the parameter associated with the ramp signal comprises at least one of an amplitude of the ramp and a time duration during which the ramp signal is turned on.

13. The method as claimed in claim 11 , wherein the tunable current is adapted to increase the delay of the ramp signal upon identifying that the parameter of the ramp signal is greater than the constant reference value and to decrease a delay of the ramp signal upon identifying that the parameter is smaller than the constant reference value.

Assignees

• Powerventure Semiconductor Ltd
• Dialog Semiconductor Uk Ltd

Inventors

• Huang Chi-Chia
• Hsiao Yuan-Wen

Classifications

• H02M3/1582

  Buck-boost converters (H02M3/1584 takes precedence) · CPC title

• H02M3/1588

  comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

• H02M3/157

  with digital control · CPC title

• H02M3/1584

  with a plurality of power processing stages connected in parallel · CPC title

• H02M2001/0025

  Electricity · mapped topic