Reverse current protection for a switching unit

US10186859B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10186859-B2
Application numberUS-201615059121-A
CountryUS
Kind codeB2
Filing dateMar 2, 2016
Priority dateMar 2, 2016
Publication dateJan 22, 2019
Grant dateJan 22, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one example, a circuit includes a switching unit including a first node, a second node, a control node, and a body. The switching unit is configured to selectively couple the first node of the switching unit to the second node of the switching unit in response to receiving a control signal at a control input of the switching unit. The circuit further includes a reverse current protection unit configured to reduce a current flow from the second node of the switching unit to the first node of the switching unit. The reverse current protection unit selectively couples the first node of the switching unit and the body of the switching unit and selectively couples the second node of the switching unit to the body of the switching unit.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit comprising: a switching unit comprising a first node, a second node, a control node, and a body, wherein the switching unit is configured to selectively couple the first node of the switching unit and the second node of the switching unit in response to receiving a control signal at the control node of the switching unit, wherein the switching unit is configured to operate in a closed state and an open state, wherein during the closed state the switching unit permits current to flow bi-directionally between the first node of the switching unit and the second node of the switching unit, and wherein during the open state the switching unit reduces current flow between the first node of the switching unit and the second node of the switching unit; a reverse current protection unit configured to reduce a current flow from the second node of the switching unit to the first node of the switching unit, wherein the reverse current protection unit selectively couples the first node of the switching unit to the body of the switching unit and selectively couples the second node of the switching unit to the body of the switching unit; an output node coupled to the second node of the switching unit and configured to be coupled to a first node of a load circuit; and a driver unit configured to generate the control signal received at the control node of the switching unit to cause the switching unit to operate in the open state when a voltage of a ground rail configured to be coupled to a second node of the load circuit is greater than a voltage of the first node of the switching unit. 2. The circuit according to claim 1 , wherein the reverse current protection unit couples the second node of the switching unit to the body of the switching unit in response to a voltage of the second node of the switching unit being greater than a voltage of the first node of the switching unit. 3. The circuit according to claim 1 , further comprising: a voltage rail coupled to the first node of the switching unit; the ground rail; and the load circuit. 4. A circuit comprising: a switching unit comprising a first node, a second node, a control node, and a body, wherein the switching unit is configured to selectively couple the first node of the switching unit and the second node of the switching unit in response to receiving a control signal at the control node of the switching unit; a reverse current protection unit configured to reduce a current flow from the second node of the switching unit to the first node of the switching unit, wherein the reverse current protection unit selectively couples the first node of the switching unit to the body of the switching unit and selectively couples the second node of the switching unit to the body of the switching unit; and an output node coupled to the second node of the switching unit and configured to be coupled to a first node of a load circuit, wherein the reverse current protection unit comprises: a first resistive element comprising a first node and a second node, the second node of the first resistive element being coupled to a ground rail configured to be coupled to a second node of the load circuit; and a first transistor comprising an emitter coupled to the first node of the switching unit, a collector coupled to the body of the switching unit, and a base coupled to the first node of the first resistive element. 5. The circuit according to claim 4 , wherein the reverse current protection unit further comprises: a second resistive element comprising a first node coupled to the first node of the switching unit and a second node; and a second transistor comprising an emitter coupled to the second node of the switching unit, a collector coupled to the body of the switching unit, and a base coupled to the second node of the second resistive element. 6. The circuit according to claim 5 , wherein the reverse current protection unit further comprises: a third transistor comprising an emitter coupled to the ground rail, a collector coupled to the body of the switching unit, and a base coupled to the second node of the second resistive element. 7. The circuit according to claim 6 , wherein the reverse current protection unit couples the body of the switching unit and the ground rail in response to a voltage of the ground rail being greater than a voltage of the first node of the switching unit voltage rail. 8. The circuit according to claim 3 , wherein the driver unit is further configured to generate the control signal received at the control node of the switching unit to cause the switching unit to operate in the open state when a voltage of the first node of the load circuit is greater than a voltage of the voltage rail. 9. An integrated circuit comprising: a driver unit configured to receive an input signal on an input node of the integrated circuit and to generate a control signal in response to the input signal received on the input node; a switching unit comprising a first node coupled to a voltage rail of the integrated circuit, a second node coupled to an output node of the integrated circuit, and a body, wherein the switching unit is configured to selectively couple the first node of the switching unit and the second node of the switching unit in response to the control signal generated by the driver unit; and a reverse current protection unit configured to reduce a current flow from the second node of the switching unit to the first node of the switching unit, wherein the reverse current protection unit is configured to selectively couple the first node of the switching unit to the body of the switching unit and to selectively couple the second node of the switching unit to the body of the switching unit and wherein the reverse current protection unit is configured to selectively couple a ground rail of the integrated circuit to the body of the switching unit. 10. The integrated circuit according to claim 9 , wherein: the reverse current protection unit couples the body of the switching unit and the ground rail in response to a voltage of the ground rail being greater than a voltage of the first node of the switching unit. 11. An integrated circuit comprising: a driver unit configured to receive an input signal on an input node of the integrated circuit and to generate a control signal in response to the input signal received on the input node; a switching unit comprising a first node coupled to a voltage rail of the integrated circuit, a second node coupled to an output node of the integrated circuit, and a body, wherein the switching unit is configured to selectively couple the first node of the switching unit and the second node of the switching unit in response to the control signal generated by the driver unit; and a reverse current protection unit configured to reduce a current flow from the second node of the switching unit to the first node of the switching unit, wherein the reverse current protection unit is configured to selectively couple the first node of the switching unit to the body of the switching unit and to selectively couple the second node of the switching unit to the body of the switching unit, wherein the driver unit is configured to compare a voltage of the voltage rail with a voltage of the output node, and wherein the driver unit generates the control signal further in response to the comparison of the voltage of the voltage rail with the voltage of the output node. 12. The integrated circuit according to claim 11 , wherein the driver unit generates the control signal to operate the switching unit in an open state when the voltage of the output node is greater than the volt

Assignees

Inventors

Classifications

  • responsive to excess current {(current limitation for voltage regulators G05F1/573; disconnection after limiting H02H3/025)} · CPC title

  • H02H7/222Primary

    for switches · CPC title

  • Special modifications or use of the back gate voltage of a FET · CPC title

  • H02H9/04Primary

    responsive to excess voltage (lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T) · CPC title

  • responsive to excess voltage appearing at terminals of integrated circuits · CPC title

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What does patent US10186859B2 cover?
In one example, a circuit includes a switching unit including a first node, a second node, a control node, and a body. The switching unit is configured to selectively couple the first node of the switching unit to the second node of the switching unit in response to receiving a control signal at a control input of the switching unit. The circuit further includes a reverse current protection uni…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H02H7/222. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 22 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).