Three-terminal metastable symmetric zero-volt battery memristive device

Patent metadata

Field	Value
Publication number	US-10186657-B2
Application number	US-201715832300-A
Country	US
Kind code	B2
Filing date	Dec 5, 2017
Priority date	Jun 7, 2017
Publication date	Jan 22, 2019
Grant date	Jan 22, 2019

Abstract

A method of fabricating a memristive structure for symmetric modulation between resistance states is presented. The method includes forming a first electrode and a second electrode over an insulating substrate, forming an anode contacting the first and second electrodes, forming an ionic conductor over the anode, forming a cathode of the same material as the anode over the ionic conductor, forming a third electrode over the cathode, and enabling bidirectional transport of ions between the anode and cathode resulting in a resistance adjustment of the memristive structure, the anode and the cathode being formed from metastable mixed conducting materials with ion concentration dependent conductivity.

First claim

What is claimed is:

1. A method for providing symmetric modulation between resistance states of a memristive device, the method comprising:
forming a first electrode and a second electrode each directly contacting an insulating substrate therein;
forming an anode contacting the first and second electrodes;
forming an ionic conductor over the anode;
forming a cathode over the ionic conductor;
forming a third electrode over the cathode; and
enabling bidirectional transport of ions between the anode and cathode resulting in a resistance adjustment of the memristive structure, the anode and the cathode being formed from metastable materials.

2. The method of claim 1 , wherein the resistance adjustment involves resistance switching for maintaining the symmetric modulation between the resistance states.

3. The method of claim 1 , wherein the first, second, and third electrodes are formed from inert metals.

4. The method of claim 1 , wherein the metastable materials are metastable phase separated mixed ionic-electronic conductors (MIEC) whose conductivity is dependent on a concentration of an intercalated mobile ion.

5. The method of claim 1 , wherein electrical pulses are applied between the first electrode and the third electrode or between the second electrode and the third electrode to enable a write operation.

6. The method of claim 1 , wherein electrical pulses are applied between the first and second electrodes to enable a read operation.

7. The method of claim 1 , wherein a movement of the ions is enabled by application of a voltage to enable concurrent operation of read and write operations.

8. The method of claim 1 , wherein a chemical potential difference of ions between the anode and the cathode is maintained near zero.

9. The method of claim 1 , wherein the first and second electrodes are substantially planar.

Assignees

• IBM

Inventors

• Brew Kevin W
• Gershon Talia S
• Kim Seyoung
• Newns Dennis M
• Todorov Teodor K

Classifications

• G11C2213/53

  Structure wherein the resistive material being in a transistor, e.g. gate · CPC title

• G11C13/0011 Primary

  comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs] · CPC title

• G11C2013/0066

  Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing · CPC title

• G11C13/004

  Reading or sensing circuits or methods · CPC title

• G11C2013/005

  Read using potential difference applied between cell electrodes · CPC title